Abstract: A hybrid mapping and localization system using continuous localization algorithms is disclosed. When a localization quality is sufficiently high, based on a validated points localization monitor metric, then the map updates are allowed to be made on the localization map. This helps localizing in dynamic environments because these environment changes are actually integrated into the underlying map, so that the particle filter does not snap to incorrect object locations.

Abstract: Implementations of semiconductor packages may include: a first semiconductor die having a plurality of balls coupled to a first side thereof, a second semiconductor die, a lead frame having a die attach area on a first side of the lead frame, the die attach area containing an opening therethrough and one or more wire bonds. The first semiconductor die may be coupled to a backside of the second semiconductor die by an adhesive on a second side of the first semiconductor die opposing the first side. The second semiconductor die may be mechanically and electrically coupled to the lead frame through one or more wire bonds at the die attach area. The first semiconductor die may be positioned within the opening in the center of the lead frame.

Abstract: Implementations of semiconductor packages may include: a first semiconductor die having a plurality of balls coupled to a first side thereof, a second semiconductor die, a lead frame having a die attach area on a first side of the lead frame, the die attach area containing an opening therethrough and one or more wire bonds. The first semiconductor die may be coupled to a backside of the second semiconductor die by an adhesive on a second side of the first semiconductor die opposing the first side. The second semiconductor die may be mechanically and electrically coupled to the lead frame through one or more wire bonds at the die attach area. The first semiconductor die may be positioned within the opening in the center of the lead frame.

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: Systems and methods are provided for depositing solder in a first pattern over a first bonding pad on the substrate; depositing solder in a second pattern over a second bonding pad on the substrate, wherein the second pattern defines a larger area than the first pattern; placing the electronic device on the substrate such that pads on the electronic device are aligned with the first and second bonding pads; and reflowing the solder between the pads on the electronic device and the first and second bonding pads, causing the solder deposited on the first bonding pad to form a first solder joint and the solder deposited on the second bonding pad to form a second solder joint. The second solder joint is larger than the first solder joint causing the electronic device to be attached at an angle relative to the substrate.

Abstract: A microphone apparatus includes a carrier chip and a microphone chip. The carrier chip includes a substrate with parallel top and bottom surfaces, a metallization layer overlying the top surface, and a cylindrical cavity that is bored through the top surface and the metallization layer and partially through the carrier substrate. The microphone chip includes a substrate with parallel top and bottom surfaces, a cylindrical cavity extending from the microphone substrate top surface to the microphone substrate bottom surface, and a diaphragm attached to the microphone substrate bottom surface and extending across the microphone cavity. The microphone chip is fixed to the carrier chip, with the microphone cavity overlying the carrier cavity, and the diaphragm covering the carrier cavity and electrically connected to the metallization layer.

Abstract: Systems and methods are provided for depositing solder in a first pattern over a first bonding pad on the substrate; depositing solder in a second pattern over a second bonding pad on the substrate, wherein the second pattern defines a larger area than the first pattern; placing the electronic device on the substrate such that pads on the electronic device are aligned with the first and second bonding pads; and reflowing the solder between the pads on the electronic device and the first and second bonding pads, causing the solder deposited on the first bonding pad to form a first solder joint and the solder deposited on the second bonding pad to form a second solder joint. The second solder joint is larger than the first solder joint causing the electronic device to be attached at an angle relative to the substrate.

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: A thick film circuit with a perimeter anchored thick film pad is provided. The thick film circuit includes a base substrate, a thick film bonding pad, and a solder mask layer. The thick film bonding pad is formed on the surface of the base substrate. The solder mask layer is also formed on the surface of the base substrate, and overlaps a portion of the thick film bonding pad in order to improve adhesion between the thick film bonding pad and the base substrate.

Abstract: A thick film circuit with a perimeter anchored thick film pad is provided. The thick film circuit includes a base substrate, a thick film bonding pad, and a solder mask layer. The thick film bonding pad is formed on the surface of the base substrate. The solder mask layer is also formed on the surface of the base substrate, and overlaps a portion of the thick film bonding pad in order to improve adhesion between the thick film bonding pad and the base substrate.