Patents by Inventor Mark W. Levie

Mark W. Levie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190274422
    Abstract: A storage shelving system having a width and a height includes a left lower part, a right lower part, a left upper part, and right upper part. The left lower part is telescopically positioned relative to the right lower part to slide within the left lower part. The left upper part is telescopically positioned relative to the right upper part to slide within the right upper part. The left lower part and left upper part are fixably coupled together such that the left lower part vertically aligns with the left upper part. The right lower part and right upper part are fixably coupled together such that the right lower part vertically aligns with the right upper part. The left lower part and left upper part are movable in concert towards and away from the right lower part and right upper part to increase the width of the shelving system or decrease the width of the shelving system.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 12, 2019
    Inventors: Mark W. Levie, David M. Lee
  • Publication number: 20160100699
    Abstract: A basket having a handle for organizing products on a shelf includes a solid base wall, a plurality of peripheral walls, and a handle. The plurality of peripheral walls extends upwardly from the base wall and define an upper rim of the basket and a recess therebetween. The handle has at least a first and a second part. The first part is substantially perpendicular to the second part and has an upper surface that is flush with the upper rim of the basket. The first part lies in a plane defined by the upper rim of the basket. The second part is spaced from an adjacent peripheral wall in order to fit a hand of a user between the peripheral wall and the second part. The second part extends downwardly from an end of the first part.
    Type: Application
    Filed: October 9, 2014
    Publication date: April 14, 2016
    Inventor: Mark W. Levie
  • Publication number: 20150260446
    Abstract: A removable shelf liner includes a solid base wall, a plurality of side walls extending upwardly from the base wall, and a handle portion. The shelf liner has a height, length and width that permits its use on a shelf of a refrigerator.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 17, 2015
    Inventor: Mark W. Levie
  • Publication number: 20150114239
    Abstract: A cover for a cut portion of a fruit or vegetable includes a fruit or vegetable engaging base surface, a raised boundary rim coupled to the base surface, and at least one spike emanating from the base surface. In another embodiment, a cover for covering a cut portion of food includes a base having an outer perimeter and a food engaging surface, and a food penetrating member extending outwardly from the food engaging surface.
    Type: Application
    Filed: March 11, 2014
    Publication date: April 30, 2015
    Applicant: Discovery, Inc.
    Inventor: Mark W. Levie
  • Publication number: 20140261020
    Abstract: A cover for a cut portion of a fruit or vegetable includes a fruit or vegetable engaging base surface, a raised boundary rim coupled to the base surface, and at least one spike emanating from the base surface. In another embodiment, a cover for covering a cut portion of food includes a base having an outer perimeter and a food engaging surface, and a food penetrating member extending outwardly from the food engaging surface.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 18, 2014
    Inventor: Mark W. Levie
  • Patent number: 5657267
    Abstract: Individual cells in a memory array are structured and interconnected to permit detection and identification of the locations of errors known as Single Event Upsets (SEUs), with the correction and identification of an affected cell made using only a single parity bit for a group of cells in a memory array, eliminating the necessity for reading an entire memory in order to detect SEUs immediately, and eliminate large numbers of non-useful correction-code cells in order to increase the net useful density of cells in a memory and tolerate a larger rate of SEU events than for previous methods, additionally eliminate the need for purification of packaging materials for memory arrays by removing most radioactive materials and providing a further economic benefit by eliminating the need for organic coatings, which can cause reliability hazards, and to block alpha particles originating in packaging.
    Type: Grant
    Filed: October 5, 1995
    Date of Patent: August 12, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Mark W. Levi
  • Patent number: 5650629
    Abstract: An alignment mark and pattern is disclosed for use on semiconductor substrates which are to be patterned in an electron lithography machine. The detector includes two interleaved N-well portions mounted on a P-substrate. The interleaved "fingers" of the N-well portions are spaced to provide narrow gaps which are approximately the width of a projected electron beam. When the beam is located within the gap (or gaps) the projection is in alignment.
    Type: Grant
    Filed: June 28, 1994
    Date of Patent: July 22, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Mark W. Levi
  • Patent number: 5526305
    Abstract: A dynamic random access memory circuit for storing an information signal using both a data input line and a data output line for a two-transistor dynamic ram cell memory circuit is disclosed. The circuit is incorporated into an integrated circuit array of similar cells. Because of the nature of the circuitry, the data input and output lines of each cell in the array are laid out in parallel, and the data-out line of one random access memory cell becomes the data-in line of the adjacent random access memory cell. Thus, while the addition of a separate line for data-in and data-out adds structure to a single cell, it reduces the overall structure of an array of such cells, and results in a more compact construction of a memory array.
    Type: Grant
    Filed: June 17, 1994
    Date of Patent: June 11, 1996
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Mark W. Levi
  • Patent number: 5471844
    Abstract: A packaging apparatus used to store semiconductor devices with a coolant without contaminating the semiconductor devices. The apparatus has an enclosure which is evacuated at room temperature and then cooled in an atmosphere of coolant gas until the gas condenses and the enclosure is partially filled with liquid. The enclosure is then heated to allow the liquid to evaporate and a thermally activated mechanism to trap pure cold gas inside the enclosure. The trapped gas increases internal pressure which maintains a tight seal of the trapping mechanism against a gasket.
    Type: Grant
    Filed: November 18, 1994
    Date of Patent: December 5, 1995
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Mark W. Levi
  • Patent number: 5434816
    Abstract: A two transistor dynamic random access memory can be treated as a pair of voltage controlled elements which are reversibly controlled in a three step process. In the first step, a capacitance is charged on the controlling terminal of memory transistor. The second step entails isolating the charge on the capacitance of the controlling terminal. The third step entails providing a reversibly controlled voltage on the controlling terminal to further control the two memory transistors without altering the charge of the capacitance. This allows a non-destructive reading of the output of the stored information signal.
    Type: Grant
    Filed: June 23, 1994
    Date of Patent: July 18, 1995
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Mark W. Levi
  • Patent number: 5419787
    Abstract: An insulating film with low thermal expansion characteristics is formed by depositing aluminum alloy materials in thin film form without the use of high temperatures and which can then be oxidized to create an insulating film which has low stress. A mixture of aluminum and magnesium oxides, known as spinel, has the proportions which are approximately correct for zero expansion when crystallization results from the oxidation.
    Type: Grant
    Filed: June 24, 1994
    Date of Patent: May 30, 1995
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Mark W. Levi
  • Patent number: 5214562
    Abstract: An electrostatic discharge protective apparatus for an integrated circuit having normally on semiconductor devices mutually connecting input/output pads and the power in bonding pad to prevent stray electrostatic discharges from damaging the integrated circuit components when the integrated circuit is not powered on. All adjacent input/output pads are connected to each other by a normally on transistor. Each pad is additionally connected to a power supply pad by a normally on transistor.
    Type: Grant
    Filed: June 14, 1991
    Date of Patent: May 25, 1993
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Mark W. Levi
  • Patent number: 5132612
    Abstract: An apparatus for applying high current fast rise time pulses simulating electrostatic discharge (ESD) to various combinations of pins of a device under test (e.g., a microcircuit). The apparatus also provides for testing of the DUT after the performance of ESD stress testing. The apparatus establishes electrical connections between the terminals of a high voltage pulse generator (HVPG) and several different combinations of the DUT pins in sequence in order to apply ESD stresses. The apparatus further provides functional parameter tests whether the connection to the DUT pins during ESD stressing has caused the DUT to fail.
    Type: Grant
    Filed: March 14, 1991
    Date of Patent: July 21, 1992
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Daniel J. Burns, Mark W. Levi
  • Patent number: 5009240
    Abstract: A wafer cleaning system which cleans semiconductor wafers by sand blasting them with ice particles is disclosed. In this system a stream of gas is conducted by a conduit to the semiconductor wafer while a spray of water is frozen into the ice particles by a number of cooling coil systems which protrude into the conduit. After the semiconductor wafer is sandblasted with ice, any residual ice is removed simply by evaporating it. This results in a clean wafer without the contamination that can accompany chemical solvents of other semiconductor cleaning and etching systems.
    Type: Grant
    Filed: July 7, 1989
    Date of Patent: April 23, 1991
    Assignee: United States of America
    Inventor: Mark W. Levi
  • Patent number: 4839965
    Abstract: A skimmer/separator ladle has a handle, a spoon integral with the handle; with the spoon having a spout at one end and a container section at the other end and wherein there is provided a separator gate vertically and removably mounted in the spoon between the spout and the container section. The gate has a concave bottom so as to define a liquid passage between it and the bottom of the ladle.
    Type: Grant
    Filed: April 4, 1988
    Date of Patent: June 20, 1989
    Assignee: LK Mfg.
    Inventor: Mark W. Levie
  • Patent number: 4359261
    Abstract: An electro-optical crystal slab defining an optical waveguide modulator between two parallel boundary regions. Each boundary region has electrodes next to the channel and a doped area immediately outside the region. An electric field applied via the boundary electrodes creates a low index of refraction and transmitted light remains in the waveguide. When boundary fields are removed some light is absorbed by the doped material. Fields applied to compensating electrodes lower the index of refraction of the doped area so that the light is directed into it and absorbed. Any light passing through the absorbing material is contained in an alternate channel.
    Type: Grant
    Filed: August 8, 1980
    Date of Patent: November 16, 1982
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Mark W. Levi
  • Patent number: D440116
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: April 10, 2001
    Assignee: World Kitchen, Inc.
    Inventor: Mark W. Levie
  • Patent number: D444031
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: June 26, 2001
    Assignee: World Kitchen, Inc.
    Inventor: Mark W. Levie
  • Patent number: D445301
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: July 24, 2001
    Assignee: World Kitchen, Inc.
    Inventor: Mark W. Levie
  • Patent number: D305491
    Type: Grant
    Filed: October 3, 1986
    Date of Patent: January 16, 1990
    Assignee: LK Manufacturing Corporation
    Inventor: Mark W. Levie