Patents by Inventor Mark W. P. Dane

Mark W. P. Dane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7603647
    Abstract: A method and apparatus for recognizing a state machine in circuit design in a high-level IC description language. The present invention analyzes high-level IC description language code, such as VHDL and Verilog®, of an IC design and extracts description information corresponding to a state machine. The description information can be, for example, the high-level IC description language code corresponding to the state machine, a state diagram of the state machine, a state table for the state machine, or other representation of the state machine. In one embodiment, the present invention identifies a set of one or more processes as defined by VHDL “process” statements. By identifying one or more clocked processes, one or more transition processes, and one or more output processes, the present invention provides a state machine summary to describe the state machine identified in the high-level IC description language code.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: October 13, 2009
    Inventors: Michael E. J. Gilford, Gordon N. Walker, Jacob L. Tredinnick, Mark W. P. Dane, Michael J. Reynolds
  • Patent number: 7152214
    Abstract: A method and apparatus for recognizing a state machine in circuit design in a high-level IC description language. The present invention analyzes high-level IC description language code, such as VHDL and Verilog®, of an IC design and extracts description information corresponding to a state machine. The description information can be, for example, the high-level IC description language code corresponding to the state machine, a state diagram of the state machine, a state table for the state machine, or other representation of the state machine. In one embodiment, the present invention identifies a set of one or more processes as defined by VHDL “process” statements. By identifying one or more clocked processes, one or more transition processes, and one or more output processes, the present invention provides a state machine summary to describe the state machine identified in the high-level IC description language code.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: December 19, 2006
    Inventors: Michael E. J. Gilford, Gordon N. Walker, Jacob L. Tredinnick, Mark W. P. Dane, Michael J. Reynolds
  • Patent number: 6480985
    Abstract: Briefly, the present invention analyzes high-level IC description language code, such as VHDL and Verilog, of an integrated circuit (IC) design and generates graphical representations of the IC design based on the code analyzed. The graphical representations can include one or more of the following: 1) a block diagram of functional blocks; 2) a state diagram of a state machine; and 3) a flow chart of an operation al flow of the IC. Graphical representations provide more understandable representations of circuits described by the high-level IC description language code than the code itself.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: November 12, 2002
    Assignee: Mentor Graphics Corporation
    Inventors: Michael J. Reynolds, Jacob L. Tredinnick, Shahram Najm, Michael E. J. Gilford, Gordon N. Walker, Mark W. P. Dane
  • Patent number: 6289489
    Abstract: The present invention beneficially provides a method and apparatus for cross-referencing graphical objects and hardware description language (HDL) statements. According to one aspect of the present invention, a cross-referencing record is automatically generated to map graphical objects to corresponding HDL statements. According to a second aspect of the invention, a request is received to cross-reference a HDL statement and a graphical object. Based on the request, the cross-referencing record is accessed to identify a target of the request.
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: September 11, 2001
    Inventors: Stephen L. Bold, Mark W. P. Dane, Michael J. Reynolds, Mark Paraskeva, James Stewart