Patents by Inventor Mark Willard Johnson

Mark Willard Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ARRAY PROCESSOR HAVING AN INSTRUCTION SEQUENCER INCLUDING A PROGRAM STATE CONTROLLER AND LOOP CONTROLLERS
    Publication number: 20240419448
    Abstract: An apparatus includes an array processor to process array data. The array data are arranged in a memory. The array data are specified with programmable per-dimension size and stride values. A method for processing array data includes executing at least one loop by at least one corresponding loop controller of a plurality of loop controllers in an array processor. Each loop of the at least one loop is executed according to a corresponding begin flag and a corresponding end flag. The method may include generating an instruction stream by decoding a loop control field of a corresponding macro-instruction. The method may include configuring the corresponding begin flag and the corresponding end flag according to a corresponding begin flag field in the instruction stream and a corresponding end flag field in the instruction stream.
    Type: Application
    Filed: August 27, 2024
    Publication date: December 19, 2024
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson, Sebastian Ahmed
  • Processor with macro-instruction achieving zero-latency data movement
    Patent number: 12153921
    Abstract: An apparatus includes an array processor to process array data in response to a set of macro-instructions. A macro-instruction in the set of macro-instructions performs loop operations, array iteration operations, and/or arithmetic logic unit (ALU) operations.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: November 26, 2024
    Assignee: Silicon Laboratories Inc.
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson, Daniel Thomas Riedler
  • Array processor using programmable per-dimension size values and programmable per-dimension stride values for memory configuration
    Patent number: 12086597
    Abstract: An apparatus includes an array processor to process at least one array. The apparatus further includes a memory coupled to the array processor. The at least one array is stored in memory with programmable per-dimension size and stride values.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: September 10, 2024
    Assignee: Silicon Laboratories Inc.
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson
  • Array processor having an instruction sequencer including a program state controller and loop controllers
    Patent number: 12079630
    Abstract: An apparatus includes an array processor to process array data. The array data are arranged in a memory. The array data are specified with programmable per-dimension size and stride values.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: September 3, 2024
    Assignee: Silicon Laboratories Inc.
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson, Sebastian Ahmed
  • Apparatus for Processor with Macro-Instruction and Associated Methods
    Publication number: 20220413850
    Abstract: An apparatus includes an array processor to process array data in response to a set of macro-instructions. A macro-instruction in the set of macro-instructions performs loop operations, array iteration operations, and/or arithmetic logic unit (ALU) operations.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson, Daniel Thomas Riedler
  • Apparatus for Memory Configuration for Array Processor and Associated Methods
    Publication number: 20220414050
    Abstract: An apparatus includes an array processor to process at least one array. The apparatus further includes a memory coupled to the array processor. The at least one array is stored in memory with programmable per-dimension size and stride values.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson
  • Apparatus for Array Processor and Associated Methods
    Publication number: 20220414049
    Abstract: An apparatus includes an array processor to process array data. The array data are arranged in a memory. The array data are specified with programmable per-dimension size and stride values.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson, Sebastian Ahmed