Patents by Inventor Mark Yosefin

Mark Yosefin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8502895
    Abstract: A method of capturing an image of a scene using an image capture device having an array of pixels, wherein the array of pixels includes pixels of different colors, includes, for a first duration, capturing a first portion of the scene with a first plurality of the pixels of a first color, and for a second duration, capturing a second portion of the scene with a second plurality of the pixels of a second color. The first and second durations are different and the first and second durations are chosen, at least in part, to improve the signal to noise ratio of the image capture device.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: August 6, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Mark Yosefin
  • Publication number: 20110261237
    Abstract: A method of capturing an image of a scene using an image capture device having an array of pixels, wherein the array of pixels includes pixels of different colors, includes, for a first duration, capturing a first portion of the scene with a first plurality of the pixels of a first color, and for a second duration, capturing a second portion of the scene with a second plurality of the pixels of a second color. The first and second durations are different and the first and second durations are chosen, at least in part, to improve the signal to noise ratio of the image capture device.
    Type: Application
    Filed: February 17, 2011
    Publication date: October 27, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Mark Yosefin
  • Patent number: 7911518
    Abstract: A method of capturing an image of a scene using an image capture device having an array of pixels, wherein the array of pixels includes pixels of different colors, includes, for a first duration, capturing a first portion of the scene with a first plurality of the pixels of a first color, and for a second duration, capturing a second portion of the scene with a second plurality of the pixels of a second color. The first and second durations are different and the first and second durations are chosen, at least in part, to improve the signal to noise ratio of the image capture device.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: March 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Mark Yosefin
  • Publication number: 20060192867
    Abstract: A method of capturing an image of a scene using an image capture device having an array of pixels, wherein the array of pixels includes pixels of different colors, includes, for a first duration, capturing a first portion of the scene with a first plurality of the pixels of a first color, and for a second duration, capturing a second portion of the scene with a second plurality of the pixels of a second color. The first and second durations are different and the first and second durations are chosen, at least in part, to improve the signal to noise ratio of the image capture device.
    Type: Application
    Filed: January 31, 2006
    Publication date: August 31, 2006
    Applicant: TransChip, Inc
    Inventor: Mark Yosefin
  • Patent number: 5963076
    Abstract: In a circuit (10), a first N-FET (N1) and a second N-FET (N2) are coupled serially between a node (15) and ground (93). The circuit (10) accommodates a first excursion (85) of a first signal (IN) at the gates of the first N-FET (N1) which is higher than the maximum allowable drain-source voltage for N-FETs. The voltage of a second signal (OUT) between the node (15) and ground (93) is distributed across the first and the second N-FETs (N1, N2). The gate voltage of the second N-FET (N2) is not constant, but controlled by a control circuit (20) receiving signals the first signal (IN) and, optionally, the second signal (OUT). With the variation of the gate voltage for the second N-FET (N2), the size of both transistors (N1, N2) can be reduced and the fall time (T.sub.F) of the second signal (OUT) can be reduced.
    Type: Grant
    Filed: April 14, 1997
    Date of Patent: October 5, 1999
    Assignee: Motorola, Inc.
    Inventors: Joseph Shor, Mark Yosefin, Dan Mauricio Bruck
  • Patent number: 5952875
    Abstract: An I/O circuit whose output receives a voltage V.sub.PAD which is temporarily higher than a critical voltage V.sub.DS MAX >V.sub.DS 1 across drain and source of a conducting first N-FET (110, N1) acting as a pull-down device. The first N-FET is protected against hotelectron induced degradation by a serially coupled second N-FET (130, N3). A variable drain-source voltage V.sub.DS 3 is added to V.sub.DS 1. A comparator (150) compares the received voltage V.sub.PAD to a supply voltage V.sub.CC and pulls a gate (G) of the second N-FET (N3) to V.sub.PAD or to V.sub.CC. The conductivity of the second N-FET (N3) is thereby changed so that VPAD is distributed among V.sub.DS 1 and V.sub.DS 2. The comparator (150) conveniently comprises two P-FETs (P1, P2, 160, 170).
    Type: Grant
    Filed: September 9, 1997
    Date of Patent: September 14, 1999
    Assignee: Motorola Inc.
    Inventors: Mark Yosefin, Yachin Afek, Joseph Shor