Patents by Inventor Mark Anthony Golez

Mark Anthony Golez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12118215
    Abstract: This application is directed to dynamic management of memory read request in a memory system of an electronic device. The electronic device identifies a queue of memory access requests to access the memory system. The queue of memory access requests including at least one host read request and a current system read request. The electronic device monitors a workload condition of the memory system based on the queue of memory access requests, and generates at least a first system read request and a second system read request from the current system read request based on the workload condition of the memory system. The queue of memory access requests is updated by inserting the at least one host read request after the first system read request and before the second system read request.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: October 15, 2024
    Assignee: SK Hynix NAND Product Solutions Corp.
    Inventors: Sarvesh Varakabe Gangadhar, Mark Anthony Golez, Jacky Le
  • Publication number: 20240220112
    Abstract: This application is directed to dynamic management of memory read request in a memory system of an electronic device. The electronic device identifies a queue of memory access requests to access the memory system. The queue of memory access requests including at least one host read request and a current system read request. The electronic device monitors a workload condition of the memory system based on the queue of memory access requests, and generates at least a first system read request and a second system read request from the current system read request based on the workload condition of the memory system. The queue of memory access requests is updated by inserting the at least one host read request after the first system read request and before the second system read request.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Inventors: Sarvesh Varakabe Gangadhar, Mark Anthony Golez, Jacky Le
  • Publication number: 20240020013
    Abstract: A method performed by a solid state drive is described. The method includes, on a channel that internally couples a controller of the solid state drive to a storage device of the solid state drive, sending write data for a program operation to be performed by one of the storage device's logical units in separate chunks over the channel. The method also includes inserting higher priority traffic items of other logical units of the storage device in between the separate chunks.
    Type: Application
    Filed: September 27, 2023
    Publication date: January 18, 2024
    Inventors: David J. Pelster, Yogesh B. Wakchaure, Neelesh Vemula, Aliasgar S. Madraswala, David B. Carlton, Donia Sebastian, Mark Anthony Golez, Xin Guo
  • Patent number: 11797188
    Abstract: A method performed by a solid state drive is described. The method includes, on a channel that internally couples a controller of the solid state drive to a storage device of the solid state drive, sending write data for a program operation to be performed by one of the storage device's logical units in separate chunks over the channel. The method also includes inserting higher priority traffic items of other logical units of the storage device in between the separate chunks.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: October 24, 2023
    Assignee: SK hynix NAND Product Solutions Corp.
    Inventors: David J. Pelster, Yogesh B. Wakchaure, Neelesh Vemula, Aliasgar S. Madraswala, David B. Carlton, Donia Sebastian, Mark Anthony Golez, Xin Guo
  • Publication number: 20220083280
    Abstract: Read Quality of Service (rQoS) in the solid state drive is improved by reducing latency for host random read workloads. Host read operations for random read workloads are prioritized in the solid state drive over program operations for garbage collection to reduce latency for random read workloads. The program time (tProg) and other associated latencies such as program-suspend-resume overhead, and firmware process overhead to dispatch the program are minimized by minimizing the number of program commands used for garbage collection while the solid state drive is performing read operations for a random read workload for a host read operation, allowing the solid state drive to prioritize host read operations for random read workloads while ensuring that there is no impact to the amount of written data that is on the solid state drive.
    Type: Application
    Filed: November 29, 2021
    Publication date: March 17, 2022
    Inventors: Holman SU, Mark Anthony GOLEZ, Sarvesh Varakabe GANGADHAR, David J. PELSTER
  • Patent number: 10956081
    Abstract: A data structure is maintained for performing a program operation that is allowed to be suspended to perform reads in a NAND device, where the data structure indicates a plurality of tiers, where each tier of the plurality of tiers has a number of allowed suspends of the program operation while executing in the tier, and where a sum of the number of allowed suspends for all tiers of the plurality of tiers equals a maximum allowed number of suspends of the program operation. In response to performing a resume of the program operation, after performing a read following a suspend of the program operation, a determination is made of a tier of the plurality of tiers for the program operation and a subsequent suspend of the program operation is performed only after a measure of progress of the program operation has been exceeded in the determined tier.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: March 23, 2021
    Assignee: INTEL CORPORATION
    Inventors: David J. Pelster, David B. Carlton, Mark Anthony Golez, Xin Guo, Aliasgar S. Madraswala, Sagar S. Sidhpura, Sagar Upadhyay, Neelesh Vemula, Yogesh B. Wakchaure, Ye Zhang
  • Patent number: 10770128
    Abstract: A refreshing method is described. The method includes recognizing a set of blocks of a non-volatile memory for refreshing and then refreshing a subset of the data within the blocks, where, invalid data within the blocks is not recognized for refreshing and a group of blocks whose oldest data has not aged for a pre-set time period is not recognized for refreshing.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: September 8, 2020
    Assignee: Intel Corporation
    Inventors: Mark Anthony Golez, David J. Pelster, Xin Guo, Paul D. Ruby
  • Publication number: 20200117369
    Abstract: A method performed by a solid state drive is described. The method includes, on a channel that internally couples a controller of the solid state drive to a storage device of the solid state drive, sending write data for a program operation to be performed by one of the storage device's logical units in separate chunks over the channel. The method also includes inserting higher priority traffic items of other logical units of the storage device in between the separate chunks.
    Type: Application
    Filed: December 12, 2019
    Publication date: April 16, 2020
    Inventors: David J. PELSTER, Yogesh B. WAKCHAURE, Neelesh VEMULA, Aliasgar S. MADRASWALA, David B. CARLTON, Donia SEBASTIAN, Mark Anthony GOLEZ, Xin GUO
  • Publication number: 20190243577
    Abstract: A data structure is maintained for performing a program operation that is allowed to be suspended to perform reads in a NAND device, where the data structure indicates a plurality of tiers, where each tier of the plurality of tiers has a number of allowed suspends of the program operation while executing in the tier, and where a sum of the number of allowed suspends for all tiers of the plurality of tiers equals a maximum allowed number of suspends of the program operation. In response to performing a resume of the program operation, after performing a read following a suspend of the program operation, a determination is made of a tier of the plurality of tiers for the program operation and a subsequent suspend of the program operation is performed only after a measure of progress of the program operation has been exceeded in the determined tier.
    Type: Application
    Filed: April 18, 2019
    Publication date: August 8, 2019
    Inventors: David J. PELSTER, David B. CARLTON, Mark Anthony GOLEZ, Xin GUO, Aliasgar S. MADRASWALA, Sagar S. SIDHPURA, Sagar UPADHYAY, Neelesh VEMULA, Yogesh B. WAKCHAURE, Ye ZHANG
  • Publication number: 20190043556
    Abstract: A refreshing method is described. The method includes recognizing a set of blocks of a non-volatile memory for refreshing and then refreshing a subset of the data within the blocks, where, invalid data within the blocks is not recognized for refreshing and a group of blocks whose oldest data has not aged for a pre-set time period is not recognized for refreshing.
    Type: Application
    Filed: September 28, 2018
    Publication date: February 7, 2019
    Inventors: Mark Anthony GOLEZ, David J. PELSTER, Xin GUO, Paul D. RUBY
  • Patent number: 9740437
    Abstract: Methods and apparatus related to a mechanism for quickly adapting garbage collection resource allocation for an incoming I/O (Input/Output) workload are described. In one embodiment, non-volatile memory stores data corresponding to a first workload and a second workload. Allocation of one or more resources in the non-volatile memory is determined based at least in part on a determination of an average validity of one or more blocks, where the one or more candidate bands are to be processed during operation of the first workload or the second workload. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: August 22, 2017
    Assignee: Intel Corporation
    Inventors: Neal R. Mielke, Mark Anthony Golez, David J. Pelster, Paul D. Ruby, Xin Guo
  • Publication number: 20160283161
    Abstract: Methods and apparatus related to a mechanism for quickly adapting garbage collection resource allocation for an incoming I/O (Input/Output) workload are described. In one embodiment, non-volatile memory stores data corresponding to a first workload and a second workload. Allocation of one or more resources in the non-volatile memory is determined based at least in part on a determination of an average validity of one or more blocks, where the one or more candidate bands are to be processed during operation of the first workload or the second workload. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Applicant: Intel Corporation
    Inventors: Neal R. Mielke, Mark Anthony Golez, David J. Pelster, Paul D. Ruby, Xin Guo