Patents by Inventor Mark Anthony Golez
Mark Anthony Golez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12366965Abstract: A method performed by a solid state drive is described. The method includes, on a channel that internally couples a controller of the solid state drive to a storage device of the solid state drive, sending write data for a program operation to be performed by one of the storage device's logical units in separate chunks over the channel. The method also includes inserting higher priority traffic items of other logical units of the storage device in between the separate chunks.Type: GrantFiled: September 27, 2023Date of Patent: July 22, 2025Assignee: SK hynix NAND Product Solutions CorporationInventors: David J. Pelster, Yogesh B. Wakchaure, Neelesh Vemula, Aliasgar S. Madraswala, David B. Carlton, Donia Sebastian, Mark Anthony Golez, Xin Guo
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Patent number: 12367137Abstract: This application is directed to managing garbage collection using a plurality of queues of memory bands of a memory system. The memory system obtains a request to organize data stored in a plurality of memory bands of the memory system, and each memory band has a data validity level. In response to the request, the memory system generates the plurality of queues of memory bands based on the data validity levels of the plurality of memory bands, and the plurality of queues correspond to a plurality of non-overlapping validity level ranges. The plurality of memory bands are assigned into a subset of queues based on the data validity levels of the plurality of memory bands. The memory system 200 allocates a first memory bandwidth among the subset of queues, and implements garbage collection operations on the subset of queues in parallel using respective portions of the first memory bandwidth.Type: GrantFiled: December 27, 2023Date of Patent: July 22, 2025Assignee: SK Hynix NAND Product Solutions Corp.Inventors: Paul Ruby, David J Pelster, Mark Anthony Golez, Teena Sebastian
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Publication number: 20250217279Abstract: This application is directed to managing garbage collection using a plurality of queues of memory bands of a memory system. The memory system obtains a request to organize data stored in a plurality of memory bands of the memory system, and each memory band has a data validity level. In response to the request, the memory system generates the plurality of queues of memory bands based on the data validity levels of the plurality of memory bands, and the plurality of queues correspond to a plurality of non-overlapping validity level ranges. The plurality of memory bands are assigned into a subset of queues based on the data validity levels of the plurality of memory bands. The memory system 200 allocates a first memory bandwidth among the subset of queues, and implements garbage collection operations on the subset of queues in parallel using respective portions of the first memory bandwidth.Type: ApplicationFiled: December 27, 2023Publication date: July 3, 2025Inventors: Paul RUBY, David J. PELSTER, Mark Anthony GOLEZ, Teena SEBASTIAN
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Publication number: 20250021231Abstract: This application is directed to dynamic management of memory read request in a memory system of an electronic device. The electronic device identifies a queue of memory access requests to access the memory system. The queue of memory access requests including at least one host read request and a current system read request. The electronic device monitors a workload condition of the memory system based on the queue of memory access requests, and generates at least a first system read request and a second system read request from the current system read request based on the workload condition of the memory system. The queue of memory access requests is updated by inserting the at least one host read request after the first system read request and before the second system read request.Type: ApplicationFiled: October 1, 2024Publication date: January 16, 2025Inventors: Sarvesh Varakabe GANGADHAR, Mark Anthony GOLEZ, Jacky LE
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Patent number: 12118215Abstract: This application is directed to dynamic management of memory read request in a memory system of an electronic device. The electronic device identifies a queue of memory access requests to access the memory system. The queue of memory access requests including at least one host read request and a current system read request. The electronic device monitors a workload condition of the memory system based on the queue of memory access requests, and generates at least a first system read request and a second system read request from the current system read request based on the workload condition of the memory system. The queue of memory access requests is updated by inserting the at least one host read request after the first system read request and before the second system read request.Type: GrantFiled: December 30, 2022Date of Patent: October 15, 2024Assignee: SK Hynix NAND Product Solutions Corp.Inventors: Sarvesh Varakabe Gangadhar, Mark Anthony Golez, Jacky Le
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Publication number: 20240220112Abstract: This application is directed to dynamic management of memory read request in a memory system of an electronic device. The electronic device identifies a queue of memory access requests to access the memory system. The queue of memory access requests including at least one host read request and a current system read request. The electronic device monitors a workload condition of the memory system based on the queue of memory access requests, and generates at least a first system read request and a second system read request from the current system read request based on the workload condition of the memory system. The queue of memory access requests is updated by inserting the at least one host read request after the first system read request and before the second system read request.Type: ApplicationFiled: December 30, 2022Publication date: July 4, 2024Inventors: Sarvesh Varakabe Gangadhar, Mark Anthony Golez, Jacky Le
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Publication number: 20240020013Abstract: A method performed by a solid state drive is described. The method includes, on a channel that internally couples a controller of the solid state drive to a storage device of the solid state drive, sending write data for a program operation to be performed by one of the storage device's logical units in separate chunks over the channel. The method also includes inserting higher priority traffic items of other logical units of the storage device in between the separate chunks.Type: ApplicationFiled: September 27, 2023Publication date: January 18, 2024Inventors: David J. Pelster, Yogesh B. Wakchaure, Neelesh Vemula, Aliasgar S. Madraswala, David B. Carlton, Donia Sebastian, Mark Anthony Golez, Xin Guo
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Patent number: 11797188Abstract: A method performed by a solid state drive is described. The method includes, on a channel that internally couples a controller of the solid state drive to a storage device of the solid state drive, sending write data for a program operation to be performed by one of the storage device's logical units in separate chunks over the channel. The method also includes inserting higher priority traffic items of other logical units of the storage device in between the separate chunks.Type: GrantFiled: December 12, 2019Date of Patent: October 24, 2023Assignee: SK hynix NAND Product Solutions Corp.Inventors: David J. Pelster, Yogesh B. Wakchaure, Neelesh Vemula, Aliasgar S. Madraswala, David B. Carlton, Donia Sebastian, Mark Anthony Golez, Xin Guo
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Publication number: 20220083280Abstract: Read Quality of Service (rQoS) in the solid state drive is improved by reducing latency for host random read workloads. Host read operations for random read workloads are prioritized in the solid state drive over program operations for garbage collection to reduce latency for random read workloads. The program time (tProg) and other associated latencies such as program-suspend-resume overhead, and firmware process overhead to dispatch the program are minimized by minimizing the number of program commands used for garbage collection while the solid state drive is performing read operations for a random read workload for a host read operation, allowing the solid state drive to prioritize host read operations for random read workloads while ensuring that there is no impact to the amount of written data that is on the solid state drive.Type: ApplicationFiled: November 29, 2021Publication date: March 17, 2022Inventors: Holman SU, Mark Anthony GOLEZ, Sarvesh Varakabe GANGADHAR, David J. PELSTER
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Patent number: 10956081Abstract: A data structure is maintained for performing a program operation that is allowed to be suspended to perform reads in a NAND device, where the data structure indicates a plurality of tiers, where each tier of the plurality of tiers has a number of allowed suspends of the program operation while executing in the tier, and where a sum of the number of allowed suspends for all tiers of the plurality of tiers equals a maximum allowed number of suspends of the program operation. In response to performing a resume of the program operation, after performing a read following a suspend of the program operation, a determination is made of a tier of the plurality of tiers for the program operation and a subsequent suspend of the program operation is performed only after a measure of progress of the program operation has been exceeded in the determined tier.Type: GrantFiled: April 18, 2019Date of Patent: March 23, 2021Assignee: INTEL CORPORATIONInventors: David J. Pelster, David B. Carlton, Mark Anthony Golez, Xin Guo, Aliasgar S. Madraswala, Sagar S. Sidhpura, Sagar Upadhyay, Neelesh Vemula, Yogesh B. Wakchaure, Ye Zhang
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Patent number: 10770128Abstract: A refreshing method is described. The method includes recognizing a set of blocks of a non-volatile memory for refreshing and then refreshing a subset of the data within the blocks, where, invalid data within the blocks is not recognized for refreshing and a group of blocks whose oldest data has not aged for a pre-set time period is not recognized for refreshing.Type: GrantFiled: September 28, 2018Date of Patent: September 8, 2020Assignee: Intel CorporationInventors: Mark Anthony Golez, David J. Pelster, Xin Guo, Paul D. Ruby
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Publication number: 20200117369Abstract: A method performed by a solid state drive is described. The method includes, on a channel that internally couples a controller of the solid state drive to a storage device of the solid state drive, sending write data for a program operation to be performed by one of the storage device's logical units in separate chunks over the channel. The method also includes inserting higher priority traffic items of other logical units of the storage device in between the separate chunks.Type: ApplicationFiled: December 12, 2019Publication date: April 16, 2020Inventors: David J. PELSTER, Yogesh B. WAKCHAURE, Neelesh VEMULA, Aliasgar S. MADRASWALA, David B. CARLTON, Donia SEBASTIAN, Mark Anthony GOLEZ, Xin GUO
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Publication number: 20190243577Abstract: A data structure is maintained for performing a program operation that is allowed to be suspended to perform reads in a NAND device, where the data structure indicates a plurality of tiers, where each tier of the plurality of tiers has a number of allowed suspends of the program operation while executing in the tier, and where a sum of the number of allowed suspends for all tiers of the plurality of tiers equals a maximum allowed number of suspends of the program operation. In response to performing a resume of the program operation, after performing a read following a suspend of the program operation, a determination is made of a tier of the plurality of tiers for the program operation and a subsequent suspend of the program operation is performed only after a measure of progress of the program operation has been exceeded in the determined tier.Type: ApplicationFiled: April 18, 2019Publication date: August 8, 2019Inventors: David J. PELSTER, David B. CARLTON, Mark Anthony GOLEZ, Xin GUO, Aliasgar S. MADRASWALA, Sagar S. SIDHPURA, Sagar UPADHYAY, Neelesh VEMULA, Yogesh B. WAKCHAURE, Ye ZHANG
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Publication number: 20190043556Abstract: A refreshing method is described. The method includes recognizing a set of blocks of a non-volatile memory for refreshing and then refreshing a subset of the data within the blocks, where, invalid data within the blocks is not recognized for refreshing and a group of blocks whose oldest data has not aged for a pre-set time period is not recognized for refreshing.Type: ApplicationFiled: September 28, 2018Publication date: February 7, 2019Inventors: Mark Anthony GOLEZ, David J. PELSTER, Xin GUO, Paul D. RUBY
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Patent number: 9740437Abstract: Methods and apparatus related to a mechanism for quickly adapting garbage collection resource allocation for an incoming I/O (Input/Output) workload are described. In one embodiment, non-volatile memory stores data corresponding to a first workload and a second workload. Allocation of one or more resources in the non-volatile memory is determined based at least in part on a determination of an average validity of one or more blocks, where the one or more candidate bands are to be processed during operation of the first workload or the second workload. Other embodiments are also disclosed and claimed.Type: GrantFiled: March 27, 2015Date of Patent: August 22, 2017Assignee: Intel CorporationInventors: Neal R. Mielke, Mark Anthony Golez, David J. Pelster, Paul D. Ruby, Xin Guo
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Publication number: 20160283161Abstract: Methods and apparatus related to a mechanism for quickly adapting garbage collection resource allocation for an incoming I/O (Input/Output) workload are described. In one embodiment, non-volatile memory stores data corresponding to a first workload and a second workload. Allocation of one or more resources in the non-volatile memory is determined based at least in part on a determination of an average validity of one or more blocks, where the one or more candidate bands are to be processed during operation of the first workload or the second workload. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: March 27, 2015Publication date: September 29, 2016Applicant: Intel CorporationInventors: Neal R. Mielke, Mark Anthony Golez, David J. Pelster, Paul D. Ruby, Xin Guo