Abstract: Disclosed is a frame synchronizing device and method for a binary data transmission system wherein digital data are transmitted as a serial bit stream organized into frames, each frame including a pre-defined frameheader, wherein said serial bit stream is inputted into a serial input portion of a serial input parallel output shift register means having at least as many stages as the number of bits of a frame, and said frames are outputted in a consecutive order from a parallel output portion of said shift register means. The particularity of the present invention is that it is detected whether or not a frameheader is present in the output of said parallel output portion, and, if not, the outputting of a frame from said parallel output portion is delayed by at least one time period which is needed for shifting a bit in said serial input portion from a stage to a next one, until synchronization is reached.

Abstract: Disclosed is a frame synchronizing device and method for a binary data transmission system wherein digital data are transmitted as a serial bit stream organized into frames, each frame including a pre-defined frameheader, wherein said serial bit stream is inputted into a serial input portion of a serial input parallel output shift register means having at least as many stages as the number of bits of a frame, and said frames are outputted in a consecutive order from a parallel output portion of said shift register means. The particularity of the present invention is that it is detected whether or not a frameheader is present in the output of said parallel output portion, and, if not, the outputting of a frame from said parallel output portion is delayed by at least one time period which is needed for shifting a bit in said serial input portion from a stage to a next one, until synchronization is reached.