Abstract: A method is described. The method comprises determining a first measurement signal (CS1) which depends on a first load current (I1) through a first transistor (Q1) which is connected in series to a load (Z); determining a second measurement signal (CS2) which depends on a second load current (I2) through a second transistor (Q2) which is connected in series to the load (Z); and comparing the first measurement signal (CS1) and the second measurement signal (CS2), in order to detect the presence of an error.

Abstract: A method is described. The method comprises determining a first measurement signal (CS1) which depends on a first load current (I1) through a first transistor (Q1) which is connected in series to a load (Z); determining a second measurement signal (CS2) which depends on a second load current (I2) through a second transistor (Q2) which is connected in series to the load (Z); and comparing the first measurement signal (CS1) and the second measurement signal (CS2), in order to detect the presence of an error.

Abstract: A description is given below of an intelligent semiconductor switch and also a method for operating an intelligent semiconductor switch integrated in a chip package. In accordance with one exemplary embodiment, the method comprises, in a first mode, in which a state control signal having a first logic level is received at a control terminal of the chip package, driving a first and a second semiconductor switch of a half-bridge in accordance with an input signal received at an input terminal of the chip package. In a second mode, in which a state control signal having a second logic level is received at the control terminal of the chip package, the method comprises setting an operating parameter depending on a pulse pastern of the input signal received at the input terminal.

Abstract: A description is given below of an intelligent semiconductor switch and also a method for operating an intelligent semiconductor switch integrated in a chip package. In accordance with one exemplary embodiment, the method comprises, in a first mode, in which a state control signal having a first logic level is received at a control terminal of the chip package, driving a first and a second semiconductor switch of a half-bridge in accordance with an input signal received at an input terminal of the chip package. In a second mode, in which a state control signal having a second logic level is received at the control terminal of the chip package, the method comprises setting an operating parameter depending on a pulse pastern of the input signal received at the input terminal.

Abstract: In some examples, a half-bridge circuit includes a first switch including a first load terminal, a second load terminal, a first control terminal, and a second control terminal that is electrically isolated from the first control terminal of the first switch. The half-bridge circuit further includes a second switch including a first load terminal electrically connected to the second load terminal of the first switch, a second load terminal, and a control terminal.

Abstract: According to an example, a device is suggested, said device comprising a switching element, an integrated sensor providing a signal and an electronic fuse that is arranged to determine a fuse condition based on the signal and based on at least one fuse characteristic and to trigger a fuse event in case the fuse condition is met.

Abstract: In some examples, a half-bridge circuit includes a first switch including a first load terminal, a second load terminal, a first control terminal, and a second control terminal that is electrically isolated from the first control terminal of the first switch. The half-bridge circuit further includes a second switch including a first load terminal electrically connected to the second load terminal of the first switch, a second load terminal, and a control terminal.

Abstract: According to an example, a device is suggested, said device comprising a switching element, an integrated sensor providing a signal and an electronic fuse that is arranged to determine a fuse condition based on the signal and based on at least one fuse characteristic and to trigger a fuse event in case the fuse condition is met.