Patents by Inventor Markus Blietz
Markus Blietz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8323403Abstract: An SOI wafer is constructed from a carrier wafer and a monocrystalline silicon layer having a thickness of less than 500 nm, an excess of interstitial silicon atoms prevailing in the entire volume of the silicon layer. The SOI wafers may be prepared by Czochralski silicon single crystal growth, the condition v/G<(v/G)crit=1.3×10?3 cm2/(K·min) being fulfilled at the crystallization front over the entire crystal cross section, with the result that an excess of interstitial silicon atoms prevails in the silicon single crystal produced; separation of at least one donor wafer from this silicon single crystal, bonding of the donor wafer to a carrier wafer, and reduction of the thickness of the donor wafer, with the result that a silicon layer having a thickness of less than 500 nm bonded to the carrier wafer remains.Type: GrantFiled: January 18, 2008Date of Patent: December 4, 2012Assignee: Siltronic AGInventors: Dieter Graef, Markus Blietz, Reinhold Wahlich, Alfred Miller, Dirk Zemke
-
Patent number: 7820549Abstract: Semiconductor wafers with a diameter of at least 200 mm comprise a silicon carrier wafer, an electrically insulating layer and a semiconductor layer located thereon, the semiconductor wafer having been produced by means of a layer transfer process comprising at least one RTA step, wherein the semiconductor wafer has a warp of less than 30 ?m, a DeltaWarp of less than 30 ?m, a bow of less than 10 ?m and a DeltaBow of less than 10 ?m. Processes for the production of a semiconductor wafer of this type require specific heat treatment regimens.Type: GrantFiled: January 31, 2008Date of Patent: October 26, 2010Assignee: Siltronic AGInventors: Markus Blietz, Robert Hoelzl, Reinhold Wahlich, Andreas Huber
-
Patent number: 7394129Abstract: An SOI wafer is constructed from a carrier wafer and a monocrystalline silicon layer having a thickness of less than 500 nm, an excess of interstitial silicon atoms prevailing in the entire volume of the silicon layer. The SOI wafers may be prepared by Czochralski silicon single crystal growth, the condition v/G<(v/G)crit=1.3×10?3 cm2/(K·min) being fulfilled at the crystallization front over the entire crystal cross section, with the result that an excess of interstitial silicon atoms prevails in the silicon single crystal produced; separation of at least one donor wafer from this silicon single crystal, bonding of the donor wafer to a carrier wafer, and reduction of the thickness of the donor wafer, with the result that a silicon layer having a thickness of less than 500 nm bonded to the carrier wafer remains.Type: GrantFiled: April 13, 2005Date of Patent: July 1, 2008Assignee: Siltronic AGInventors: Dieter Gräf, Markus Blietz, Reinhold Wahlich, Alfred Miller, Dirk Zemke
-
Publication number: 20080153259Abstract: An SOI wafer is constructed from a carrier wafer and a monocrystalline silicon layer having a thickness of less than 500 nm, an excess of interstitial silicon atoms prevailing in the entire volume of the silicon layer. The SOI wafers may be prepared by Czochralski silicon single crystal growth, the condition v/G<(v/G)crit=1.3×10?3 cm2/(K·min) being fulfilled at the crystallization front over the entire crystal cross section, with the result that an excess of interstitial silicon atoms prevails in the silicon single crystal produced; separation of at least one donor wafer from this silicon single crystal, bonding of the donor wafer to a carrier wafer, and reduction of the thickness of the donor wafer, with the result that a silicon layer having a thickness of less than 500 nm bonded to the carrier wafer remains.Type: ApplicationFiled: January 18, 2008Publication date: June 26, 2008Applicant: SILTRONIC AGInventors: Dieter Graef, Markus Blietz, Reinhold Wahlich, Alfred Miller, Dirk Zemke
-
Publication number: 20080122043Abstract: Semiconductor wafers with a diameter of at least 200 mm comprise a silicon carrier wafer, an electrically insulating layer and a semiconductor layer located thereon, the semiconductor wafer having been produced by means of a layer transfer process comprising at least one RTA step, wherein the semiconductor wafer has a warp of less than 30 ?m, a DeltaWarp of less than 30 ?m, a bow of less than 10 ?m and a DeltaBow of less than 10 ?m. Processes for the production of a semiconductor wafer of this type require specific heat treatment regimens.Type: ApplicationFiled: January 31, 2008Publication date: May 29, 2008Applicant: SILTRONIC AGInventors: Markus Blietz, Robert Hoelzl, Reinhold Wahlich, Andreas Huber
-
Publication number: 20060046431Abstract: Semiconductor wafers with a diameter of at least 200 mm comprise a silicon carrier wafer, an electrically insulating layer and a semiconductor layer located thereon, the semiconductor wafer having been produced by means of a layer transfer process comprising at least one RTA step, wherein the semiconductor wafer has a warp of less than 30 ?m, a DeltaWarp of less than 30 ?m, a bow of less than 10 ?m and a DeltaBow of less than 10 ?m. Processes for the production of a semiconductor wafer of this type require specific heat treatment regimens.Type: ApplicationFiled: August 18, 2005Publication date: March 2, 2006Applicant: Siltronic AGInventors: Markus Blietz, Robert Hoelzl, Reinhold Wahlich, Andreas Huber
-
Publication number: 20050245048Abstract: An SOI wafer is constructed from a carrier wafer and a monocrystalline silicon layer having a thickness of less than 500 nm, an excess of interstitial silicon atoms prevailing in the entire volume of the silicon layer. The SOI wafers may be prepared by Czochralski silicon single crystal growth, the condition v/G<(v/G)crit=1.3×10?3 cm2/(K·min) being fulfilled at the crystallization front over the entire crystal cross section, with the result that an excess of interstitial silicon atoms prevails in the silicon single crystal produced; separation of at least one donor wafer from this silicon single crystal, bonding of the donor wafer to a carrier wafer, and reduction of the thickness of the donor wafer, with the result that a silicon layer having a thickness of less than 500 nm bonded to the carrier wafer remains.Type: ApplicationFiled: April 13, 2005Publication date: November 3, 2005Applicant: Siltronic AGInventors: Dieter Graf, Markus Blietz, Reinhold Wahlich, Alfred Miller, Dirk Zemke
-
Publication number: 20040144977Abstract: A semiconductor wafer is made of a silicon substrate wafer and an epitaxial silicon layer deposited thereon. The substrate wafer has a specific resistance of 0.1 to 50 &OHgr;cm, an oxygen concentration of less than 7.5*1017 atcm−3 and a nitrogen concentration of 1*1013 to 5*1015 atcm−3. The epitaxial layer is 0.2 to 1.0 &mgr;m thick and has a surface on which fewer than 30 LLS (localized light scattering) defects which are greater in size than 0.085 &mgr;m can be detected. A method for producing the semiconductor wafer has a sequence of steps for providing the substrate wafer with the aforementioned features; heating the substrate wafer in a deposition reactor to a deposition temperature of at least 1120° C.; and depositing the epitaxial layer thereon with a thickness of 0.2 to 1.0 &mgr;m, immediately after the deposition temperature has been reached.Type: ApplicationFiled: January 13, 2004Publication date: July 29, 2004Applicant: WACKER SILTRONIC GESELLSCHAFT FUR HALBLEITERMATERIALIEN AGInventors: Reinhard Schauer, Markus Blietz, Wilfried von Ammon, Rudiger Schmolke