Abstract: A semiconductor device includes: a carrier including an electronic circuit; a plurality of semiconductor chip packages mounted on the carrier, each of the chip packages including an encapsulation encapsulating the semiconductor chip, a plurality of contact structures electrically connecting the semiconductor chip with the electronic circuit, and at least one cooling structure protruding from the encapsulation; and a cooling element thermally conductively connected to at least one cooling structure of each of at least two of the plurality of semiconductor chip packages.

Abstract: A method for producing a rolling bearing component includes providing a rolling bearing component formed from a rolling bearing steel, heating the rolling bearing component to form an austenitic microstructure, and cooling the rolling bearing component in a warm salt bath to a temperature below a martensite start temperature of the rolling bearing steel. The rolling bearing component has a wall thickness or a diameter of at least 85 mm at at least one point and includes a martensitic microstructure in an edge layer region and a microstructure consisting of pearlite or upper bainite in a core region after the cooling. A rolling bearing component produced by the method and a rolling bearing comprising the rolling bearing component are also disclosed.

Abstract: A method of treating a valve body is disclosed herein. The method includes using a medium carbon steel, and treating the valve body to a carburizing heating step, an intermediate annealing step, a hardening step, and a tempering step. These steps provide a durable valve seat surface for the valve body such that the valve seat can withstand the conditions that involve high friction or otherwise intense operating conditions, such as oil and gas applications.

Abstract: A method of manufacturing a package includes: connecting an electronic component with a carrier by a clip having at least one locking recess; partially encapsulating the clip by an encapsulant so that at least part of a main surface of the clip remains partially exposed with respect to the encapsulant; and locking the encapsulant and the clip by accommodating material of the encapsulant in the at least one locking recess.

Abstract: A method includes: arranging a semiconductor device on a redistribution substrate, the device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, the redistribution substrate having an insulating board having a first major surface and a second major surface having solderable contact pads, so that the first power electrode is arranged on a first conductive pad and the control electrode is arranged on a second conductive pad on the first major surface; arranging a contact clip such that a web portion is arranged on the second power electrode and a peripheral rim portion is arranged on a third conductive pad on the first major surface; and electrically coupling the first power electrode, control electrode and peripheral rim portion to the respective conductive pads and electrically coupling the web portion to the second power electrode.

Abstract: A clip for connecting an electronic component with a carrier in a package is provided. The clip includes a clip body having a component connection portion configured to be connected with the electronic component to be mounted on the carrier, and a carrier connection portion configured to be connected with the carrier. The clip further includes at least one locking recess in a surface portion of the clip body, the surface portion being configured to face the carrier. The at least one locking recess is configured to accommodate material of an encapsulant of the package so as to lock the encapsulant and the clip. A corresponding method of manufacturing the package is also provided.

Abstract: A semiconductor chip is provided. The semiconductor chip may include a front side including a control chip contact and a first controlled chip contact, a back side including a second controlled chip contact, a backside metallization formed over the back side in contact with the second controlled chip contact, and a stop region extending at least partially along an outer edge of the back side between a contact portion of the backside metallization and the outer edge of the back side. The contact portion is configured to be attached to an electrically conductive structure by a die attach material, a surface of the stop region is recessed with respect to a surface of the contact portion, and/or the surface of the stop region has a lower wettability with respect to the die attach material than the contact portion.

Abstract: A semiconductor device includes: a carrier including an electronic circuit; a plurality of semiconductor chip packages mounted on the carrier, each of the chip packages including an encapsulation encapsulating the semiconductor chip, a plurality of contact structures electrically connecting the semiconductor chip with the electronic circuit, and at least one cooling structure protruding from the encapsulation; and a cooling element thermally conductively connected to at least one cooling structure of each of at least two of the plurality of semiconductor chip packages.

Abstract: A semiconductor package includes a leadframe including a diepad and a first row of leads, wherein at least one lead of the first row of leads is physically separated from the diepad by a gap. The semiconductor package further includes a semiconductor component arranged on the leadframe. The semiconductor package further includes an encapsulation material encapsulating the leadframe and the semiconductor component, wherein the encapsulation material includes a bottom surface arranged at a bottom surface of the semiconductor package, a top surface and a side surface extending from the bottom surface to the top surface. A side surface of at least one lead of the first row of leads is flush with the side surface of the encapsulation material. The flush side surface of the at least one lead is covered by an electroplated metal coating.

Abstract: A chip package is provided. The chip package includes a semiconductor chip having on a front side a first connecting pad and a second connecting pad, a carrier having a pad contact area and a recess, encapsulation material encapsulating the conductor chip, a first external connection that is free from or extends out of the encapsulation material, an electrically conductive clip, and a contact structure. The semiconductor chip is arranged with its front side facing the carrier with the first connecting pad over the recess and with the second connecting pad contacting the pad contact area. The clip is arranged over a back side of the semiconductor chip covering the semiconductor chip where it extends over the recess. The electrically conductive contact structure electrically conductively connects the first connecting pad with the first external connection.

Abstract: A method includes: arranging a semiconductor device on a redistribution substrate, the device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, the redistribution substrate having an insulating board having a first major surface and a second major surface having solderable contact pads, so that the first power electrode is arranged on a first conductive pad and the control electrode is arranged on a second conductive pad on the first major surface; arranging a contact clip such that a web portion is arranged on the second power electrode and a peripheral rim portion is arranged on a third conductive pad on the first major surface; and electrically coupling the first power electrode, control electrode and peripheral rim portion to the respective conductive pads and electrically coupling the web portion to the second power electrode.

Abstract: A semiconductor device includes a leadframe, a semiconductor die attached to the leadframe, and an encapsulation material encapsulating the semiconductor die and a portion of the leadframe. The leadframe includes a first main face and a second main face opposite to the first main face. The leadframe includes leads wherein each lead includes a fully plated end face extending between an unplated first sidewall and an unplated second sidewall opposite to the first sidewall. The end face and the first and second sidewalls of each lead are perpendicular to the first and second main faces.

Abstract: In an embodiment, a semiconductor package includes a package footprint having a plurality of solderable contact pads, a semiconductor device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, a redistribution substrate having an insulating board, wherein the first power electrode and the control electrode are mounted on a first major surface of the insulating board and the solderable contact pads of the package footprint are arranged on a second major surface of the insulating board, and a contact clip having a web portion and one or more peripheral rim portions. The web portion is mounted on and electrically coupled to the second power electrode and the peripheral rim portion is mounted on the first major surface of the insulating board.

Abstract: A semiconductor package is disclosed. In one example, the semiconductor package includes a package body and a semiconductor component encapsulated in the package body. A cavity is formed in a bottom surface of the package body.

Abstract: A package encloses a power semiconductor die and has a package body with a top side, footprint side and sidewalls. The die has first and second load terminals and blocks a blocking voltage between the load terminals. The package further includes: a lead frame structure for electrically and mechanically coupling the package to a support, the lead frame structure including an outside terminal extending out of the package footprint side and/or out of one of the package sidewalls and electrically connected with the first load terminal; and a top layer arranged at the package top side and electrically connected with the second load terminal. A heat spreader is mounted onto the top layer with a bottom surface facing the top layer. The area of the top surface of the heat spreader is greater than the area of the bottom surface.

Abstract: A semiconductor device includes a leadframe, a semiconductor die attached to the leadframe, and an encapsulation material encapsulating the semiconductor die and a portion of the leadframe. The leadframe includes a first main face and a second main face opposite to the first main face. The leadframe includes leads wherein each lead includes a fully plated end face extending between an unplated first sidewall and an unplated second sidewall opposite to the first sidewall. The end face and the first and second sidewalls of each lead are perpendicular to the first and second main faces.

Abstract: A clip for connecting an electronic component with a carrier in a package is provided. The clip includes a clip body having a component connection portion configured to be connected with the electronic component to be mounted on the carrier, and a carrier connection portion configured to be connected with the carrier. The clip further includes at least one locking recess in a surface portion of the clip body, the surface portion being configured to face the carrier. The at least one locking recess is configured to accommodate material of an encapsulant of the package so as to lock the encapsulant and the clip. A corresponding method of manufacturing the package is also provided.

Abstract: Electronic module comprising at least one electronic chip, an encapsulation structure in which the at least one electronic chip is at least partially encapsulated, an electrically conductive structure for the electrically conductive contacting of the at least one electronic chip, and an electrically insulating structure which is at least partially formed from a material having a low modulus of elasticity, wherein a variation of the value of the modulus of elasticity is at the most 10 GPa in a temperature range between ?40° C. and +150° C.

Abstract: A chip package is provided. The chip package includes a semiconductor chip having on a front side a first connecting pad and a second connecting pad, a carrier having a pad contact area and a recess, encapsulation material encapsulating the conductor chip, a first external connection that is free from or extends out of the encapsulation material, an electrically conductive clip, and a contact structure. The semiconductor chip is arranged with its front side facing the carrier with the first connecting pad over the recess and with the second connecting pad contacting the pad contact area. The clip is arranged over a back side of the semiconductor chip covering the semiconductor chip where it extends over the recess. The electrically conductive contact structure electrically conductively connects the first connecting pad with the first external connection.

Abstract: A semiconductor device includes a leadframe, a semiconductor die attached to the leadframe, and an encapsulation material encapsulating the semiconductor die and a portion of the leadframe. The leadframe includes a first main face and a second main face opposite to the first main face. The leadframe includes leads wherein each lead includes a fully plated end face extending between an unplated first sidewall and an unplated second sidewall opposite to the first sidewall. The end face and the first and second sidewalls of each lead are perpendicular to the first and second main faces.