Abstract: A digital signal-processing device is described which comprises a recording controller for control of recording in the memories drives a trigger-switching element arranged in the trigger line downstream of the two parallel-operating signal-processing units in such a manner that essentially the same timing period is recorded in both memories during a post-triggering period after a trigger time.

Abstract: A signal delaying device (1) for the dynamic delaying of a digitally sampled input signal comprises a memory element (2) and a series-connected interpolation element (3). According to the invention, a register (30), which can be connected to the output side of the interpolation element (3), is arranged in parallel to the memory element (2) for intermediate storage of at least one sampled value (Sin(k)) of the input signal.

Abstract: A signal-processing device includes an analog-to-digital converter for the generation of a digital input signal from an analog input signal, an intermediate memory for the intermediate storage of the digital input signal and a digital signal-processing unit for the digital processing of the digital input signal. The signal-processing unit can be switched by means of a switching device in such a manner, that the signal-processing unit is series-connected optionally either to the intermediate memory or, by-passing the intermediate memory, to the analog-to-digital converter.

Abstract: An apparatus for the determination of the magnitude of a noise (TDUT) of an electronic object to be measured (2) includes a sine signal source (1), which generates a sine signal (Sin) for input into said object to be measured (2) and a level meter (3) for the measurement of a power level at the output of the said object to be measured (2). In accord with the invention, the level meter (3) possesses a sine power detector device (31) for the capture of a sine power level ({circumflex over (P)}sin) and has a noise power level detector device (32) for a separate capture of a noise power level ({circumflex over (P)}noise).

Abstract: A signal-processing device includes an analog-to-digital converter for the generation of a digital input signal from an analog input signal, an intermediate memory for the intermediate storage of the digital input signal and a digital signal-processing unit for the digital processing of the digital input signal. The signal-processing unit can be switched by means of a switching device in such a manner, that the signal-processing unit is series-connected optionally either to the intermediate memory or, by-passing the intermediate memory, to the analog-to-digital converter.

Abstract: An apparatus and method for estimating a frequency and/or a phase of a digital input signal by determining phase values of the input signal. The phase values are then added over a predetermined summation length N/B. The sampling rate of the added-up phase values are reduced by a factor N/B in comparison with the sampling rate of the phase values. The added-up phase values are delayed in a chain of at least B?1 delay elements. The differently-delayed added-up phase values are then added or subtracted to create a resulting. pulse response of the frequency such that the resulting pulse response of the frequency is constant positive in a first interval, is zero in a second interval and is constant negative in a third interval, so that a resulting pulse response of the phase is constant in at least a middle interval or is otherwise zero.

Abstract: A signal delaying device (1) for the dynamic delaying of a digitally sampled input signal comprises a memory element (2) and a series-connected interpolation element (3). According to the invention, a register (30), which can be connected to the output side of the interpolation element (3), is arranged in parallel to the memory element (2) for intermediate storage of at least one sampled value (Sin(k)) of the input signal.

Abstract: An apparatus for the determination of the magnitude of a noise (TDUT) of an electronic object to be measured (2) includes a sine signal source (1), which generates a sine signal (Sin) for input into said object to be measured (2) and a level meter (3) for the measurement of a power level at the output of the said object to be measured (2). In accord with the invention, the level meter (3) possesses a sine power detector device (31) for the capture of a sine power level ({circumflex over (P)}sin) and has a noise power level detector device (32) for a separate capture of a noise power level ({circumflex over (P)}noise).

Abstract: A resampler is used to convert an input digital signal sequence having an input sampling rate into an output digital signal sequence having an output sampling rate (fout). An estimating unit estimates the sampling rate ratio between the input sampling rate and the output sampling rate (fout) and estimates the set point phase of the output signal sequence in observation intervals whose observation length is variable. A controlling system compares the actual phase of the output signal sequence with the set point phase and generates a control signal (RTC,k) as a function of the estimated sampling rate ratio and the deviation of the actual phase from the set point phase. An interpolator interpolates the input signal sequence for generating the output signal sequence at sampling times whose location in time is predetermined by the control signal (RTC,k).

Abstract: A resampler converts a digital input sequence with an input sampling into a digital output signal sequence with an output sampling rate. An estimation device estimates the sampling rate ratio between the input sampling rate and the output sampling rate and the desired phase of the output signal sequence in an observation interval with a predetermined length of N samples of the output signal sequence, the observation intervals overlapping in the ratio 1:6. A control device compares the actual phase of the output signal sequence with the desired phase and, in a manner dependent on the estimated sampling rate ratio and the deviation of the actual phase from the desired phase, generates a control signal for in each case N/6 samples of the output signal sequence. An interpolator interpolates the input signal sequence for the purpose of generating the output signal sequence at sampling instants whose temporal position is predetermined by a control signal.

Abstract: A device (1) for generating a digital output signal YLOG(k)/K) as a mathematical function of a digital input signal (XLOG(k)) includes a level-changing device (6), which by amplifying or attenuating the input signal (XLOG(k)) generates a first intermediate signal (A) that falls within a compressed argument range of the mathematical function and a correction signal (shiftLOG) dependent on the amplification or attenuation of the input signal (XLOG(k)). Tabulated function values of the mathematical function are stored at or between indices in a storage device (11). The tabulated function values (B1) are read from the storage device (11) in dependence on the first intermediate signal (A), and a second intermediate signal (B) is generated in dependence on the read tabulated function values (B1). The correction signal (shiftLOG) is subtracted from the second intermediate signal (B) in a subtractor (12) to yield the digital output signal YLOG(k)/K).

Abstract: A resampler (1) is used to convert a digital input signal string (Sin) with an input sampling rate (fin) into a digital output signal string (Sout) with an output sampling rate (fout). An estimating unit (11) estimates a sampling rate ratio (Rk) between the input sampling rate (fin) and the output sampling rate (fout) and a setpoint phase of the output signal string (Sout). A regulating unit (12) compares an actual phase of the output signal string (Sout) to the setpoint phase, and generates a control signal (RTC,k) as a function of the estimated sampling rate ratio (Rk) and a deviation of the actual phase from the setpoint phase. An interpolator (7) interpolates the input signal string (Sin) for producing the output signal string (Sout) at sampling times whose temporal position is determined by the control signal (RTC,k).

Abstract: A resampler device and method are used to convert a digital input signal string (Sin) with an input-sampling rate into a digital output signal string (Sout) with a higher output-sampling rate. Prior to interpolation, a time shift (tmod(n)/Tout) is first determined for every sampling time (t′n) of the output signal string (sout) relative to a next sampling time (ti+1) of the input signal string (sin). Then the time shift (&Dgr;t(n)/Tout) of the sampling time (t′n) of the output signal string (Sout) relative to the preceding sampling time (ti) of the input signal string (Sin) is determined from the previously determined time shift (tmod(n)/Tout) relative to the next sampling time (ti+1).

Abstract: A resampler device and method are used to convert a digital input signal string (Sin) with an input-sampling rate into a digital output signal string (Sout) with a higher output-sampling rate. Prior to interpolation, a time shift (tmod(n)/Tout) is first determined for every sampling time (t′n) of the output signal string (sout) relative to a next sampling time (ti+1) of the input signal string (sin). Then the time shift (&Dgr;t(n)/Tout) of the sampling time (t′n) of the output signal string (Sout) relative to the preceding sampling time (ti) of the input signal string (Sin) is determined from the previously determined time shift (tmod(n)/Tout) relative to the next sampling time (ti+1).

Abstract: A resampler converts a digital input sequence with an input sampling into a digital output signal sequence with an output sampling rate. An estimation device estimates the sampling rate ratio between the input sampling rate and the output sampling rate and the desired phase of the output signal sequence in an observation interval with a predetermined length of N samples of the output signal sequence, the observation intervals overlapping in the ratio 1:6. A control device compares the actual phase of the output signal sequence with the desired phase and, in a manner dependent on the estimated sampling rate ratio and the deviation of the actual phase from the desired phase, generates a control signal for in each case N/6 samples of the output signal sequence. An interpolator interpolates the input signal sequence for the purpose of generating the output signal sequence at sampling instants whose temporal position is predetermined by a control signal.

Abstract: A resampler is used to convert an input digital signal sequence having an input sampling rate into an output digital signal sequence having an output sampling rate (fout). An estimating unit estimates the sampling rate ratio between the input sampling rate and the output sampling rate (fout) and estimates the set point phase of the output signal sequence in observation intervals whose observation length is variable. A controlling system compares the actual phase of the output signal sequence with the set point phase and generates a control signal (RTC,k) as a function of the estimated sampling rate ratio and the deviation of the actual phase from the set point phase. An interpolator interpolates the input signal sequence for generating the output signal sequence at sampling times whose location in time is predetermined by the control signal (RTC,k).

Abstract: A resampler (1) is used to convert a digital input signal string (Sin) with an input sampling rate (fin) into a digital output signal string (Sout) with an output sampling rate (fout). An estimating unit (11) estimates a sampling rate ratio (Rk) between the input sampling rate (fin) and the output sampling rate (fout) and a setpoint phase of the output signal string (Sout). A regulating unit (12) compares an actual phase of the output signal string (Sout) to the setpoint phase, and generates a control signal (RTC,k) as a function of the estimated sampling rate ratio (Rk) and a deviation of the actual phase from the setpoint phase. An interpolator (7) interpolates the input signal string (Sin) for producing the output signal string (Sout) at sampling times whose temporal position is determined by the control signal (RTC,k).

Abstract: An apparatus for estimating the frequency (fa1) and/or the phase ((&phgr;Pa1) of a digital input signal (x(i)) comprises: a phase recording device (3) which determines phase values (Ca1(i)) of the input signal (x(i)); a first filter (4), which adds up the phase values (Ca1(i)) over a predetermined summation length N/B, which is a predetermined fraction 1/B of an observation length of N phase values (Ca1(i)), to form added-up phase values (Sa1(i)), and which reduces the sampling rate of the added-up phase values (Sa1(i)) by a factor N/B in comparison with the sampling rate (fa2) of the phase values (Ca1(i)), a second filter (8) which delays the added-up phase values (Sa1(i)) in a chain of at least B-1 delay elements (15, 16; 26-30), each delaying the added-up phase values (Sa1(i)) by one sampling period of the reduced sampling rate (fa2·B/N), and adds or subtracts the differently-delayed added-up phase values (Sa1(i)), to create a resulting pulse response (hf) of the frequency such that the resulting pu