Abstract: The invention relates to a method and an arrangement for determining a group of persons to be considered staying in an observation region by considering exception markings for other persons, wherein the group of persons to be considered is a group of the persons staying in the observation region excluding the other persons who stay in the observation region and carry one of the exception markings. Thereby, the exception markings are graphic pattern with at least one characteristic length ratio. At least one image is recorded of the observation region, and in the at least one image, the persons staying in the observation region and optical signatures of the exception markings are detected, wherein the detected optical signatures are assigned to detected persons. Furthermore, a detected group of the detected persons to be considered in the observation region is determined excluding the detected persons with assigned detected optical signature.

Abstract: The invention relates to a method and an arrangement (1) for determining a group of persons (100) to be considered staying in an observation region (50) by considering exception markings (60) for other persons (200), wherein the group of persons (100) to be considered is a group of the persons (100) staying in the observation region (50) excluding the other persons (200) who stay in the observation region (50) and carry one of the exception markings (60). Thereby, the exception markings (60) are graphic pattern with at least one characteristic length ratio. In the method, at least one image is recorded of the observation region (50), and in the at least one image, the persons (100, 200) staying in the observation region (50) and optical signatures of the exception markings (60) are detected, wherein the detected optical signatures are assigned to detected persons (200).

Abstract: In a method for calibration of a stereo camera (1) comprising two cameras (2, 3) arranged in a distance along a first direction (x) and mechanically attached to a common structure, rectification functions mapping raw image coordinates to rectified coordinates are provided. Recalibration is based on images of a scene captured by the stereo camera (1) affixed in an observation position, the recalibration yielding correction functions mapping rectified coordinates to corrected coordinates. Recalibration is based on matching objects comprised in images of the captured scene obtained by the two cameras (2, 3). The stereo camera (1) is affixed in a fixed relationship with a planar surface (4), with a known distance and angle between the stereo camera (1) and the surface (4), and objects are matched in the recalibration that belong to the surface (4), wherein a disparity caused by the known distance is exploited when determining the correction functions.

Abstract: In a method for calibration of a stereo camera (1) comprising two cameras (2, 3) arranged in a distance along a first direction (x) and mechanically attached to a common structure, rectification functions mapping raw image coordinates to rectified coordinates are provided. Recalibration is based on images of a scene captured by the stereo camera (1) affixed in an observation position, the recalibration yielding correction functions mapping rectified coordinates to corrected coordinates. Recalibration is based on matching objects comprised in images of the captured scene obtained by the two cameras (2, 3). The stereo camera (1) is affixed in a fixed relationship with a planar surface (4), with a known distance and angle between the stereo camera (1) and the surface (4), and objects are matched in the recalibration that belong to the surface (4), wherein a disparity caused by the known distance is exploited when determining the correction functions.

Abstract: According to one aspect of the invention, the circuit logic of an existing relay interlocking system is mapped onto a functionally equivalent circuit of electronic components. Semiconductor components that are functionally identical to the components of the relay circuit are thus preferably used. The circuit logic is created, for example, by transforming an interlocking table or track diagram into a logic circuit by means of an automatic compiler according to predefined rules.

Abstract: Method for determining the length of a queue of objects in a predefined region having at least one entrance and at least one exit, in the course of which errors in the acquisition of objects entering or exiting the region are corrected during the determination of the length of the queue. In a first step, a specific entry signature E of each object entering the predefined region through the at least one entrance is determined with the aid of at least one first image sensor. Thereafter, the specific entry signature E is stored in an entry list of a calculation unit, each entry signature E being provided with an index value i reflecting the temporal sequence of the entries. In addition, a value L reflecting the length of the queue of the objects is increased by one.

Abstract: Method for determining the length of a queue of objects in a predefined region having at least one entrance and at least one exit, in the course of which errors in the acquisition of objects entering or exiting the region are corrected during the determination of the length of the queue. In a first step, a specific entry signature E of each object entering the predefined region through the at least one entrance is determined with the aid of at least one first image sensor. Thereafter, the specific entry signature E is stored in an entry list of a calculation unit, each entry signature E being provided with an index value i reflecting the temporal sequence of the entries. In addition, a value L reflecting the length of the queue of the objects is increased by one.

Abstract: According to one aspect of the invention, the circuit logic of an existing relay interlocking system is mapped onto a functionally equivalent circuit of electronic components. Semiconductor components that are functionally identical to the components of the relay circuit are thus preferably used. The circuit logic is created, for example, by transforming an interlocking table or track diagram into a logic circuit by means of an automatic compiler according to predefined rules.

Abstract: The invention relates to multi-computer systems, wherein each computer (100, 200, . . . , N00) comprises a central processor (101, 201, . . . , N01) and working memory (103, 203, . . . , N03). According to one aspect of the invention, the “Internal High Speed Interconnect” (104, 204, . . . , N04) is extended beyond the internal limits of the computer and impinges upon the “High Speed Switch” (1). If need be, a single data conversion is performed in the High Speed Switch (100, 200, . . . , N00), specifically at the High Speed Interconnect Interface, and from that point the data is transferred through the “Switching Matrix” in a manner analogous to the state of the art.