Patents by Inventor Markus Jan Peter Siegert

Markus Jan Peter Siegert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10030964
    Abstract: A method performs phase shift interferometry to detect irregularities of a surface of a wafer after the wafer has been placed into an interferometer and while the wafer is vibrating. Additionally, a system and a non-transitory computer-readable storage medium have computer-executable instructions embodied thereon for performing phase shift interferometry to detect irregularities of a surface of a wafer after the wafer has been placed into an interferometer and while the wafer is vibrating.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: July 24, 2018
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: Benno Orschel, Andrey Melnikov, John F. Valley, Markus Jan Peter Siegert
  • Publication number: 20170363413
    Abstract: A method performs phase shift interferometry to detect irregularities of a surface of a wafer after the wafer has been placed into an interferometer and while the wafer is vibrating. Additionally, a system and a non-transitory computer-readable storage medium have computer-executable instructions embodied thereon for performing phase shift interferometry to detect irregularities of a surface of a wafer after the wafer has been placed into an interferometer and while the wafer is vibrating.
    Type: Application
    Filed: December 11, 2015
    Publication date: December 21, 2017
    Inventors: Benno ORSCHEL, Andrey MELNIKOV, John F. VALLEY, Markus Jan Peter SIEGERT
  • Patent number: 9634689
    Abstract: A computer-implemented method for arranging numeric data for compression is described. The method is implemented using a computing device in communication with a memory and a measurement device. The method includes receiving, by the computing device and from the measurement device, numeric data that includes a sequence of numbers, each number including at least a first byte followed by a second byte. The method additionally includes arranging the first bytes into a first contiguous set, arranging the second bytes into a second contiguous set, and storing the first contiguous set and the second contiguous set in a file in the memory, such that the first contiguous set is contiguous with the second contiguous set.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: April 25, 2017
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventor: Markus Jan Peter Siegert
  • Publication number: 20160056840
    Abstract: A computer-implemented method for arranging numeric data for compression is described. The method is implemented using a computing device in communication with a memory and a measurement device. The method includes receiving, by the computing device and from the measurement device, numeric data that includes a sequence of numbers, each number including at least a first byte followed by a second byte. The method additionally includes arranging the first bytes into a first contiguous set, arranging the second bytes into a second contiguous set, and storing the first contiguous set and the second contiguous set in a file in the memory, such that the first contiguous set is contiguous with the second contiguous set.
    Type: Application
    Filed: August 20, 2014
    Publication date: February 25, 2016
    Inventor: Markus Jan Peter Siegert
  • Patent number: 8421048
    Abstract: An example memory cell may have at least a tunneling region disposed between a conducting region and a metal region, wherein the tunneling region can have at least an active interface regio disposed between a first tunneling barrier and a second tunneling barrier. A high resistive film is formed in the interface region with migration of ions from both the metal and conducting regions responsive to a write current to program the memory cell to a selected resistive state.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: April 16, 2013
    Assignee: Seagate Technology LLC
    Inventors: Venugopalan Vaithyanathan, Markus Jan Peter Siegert, Wei Tian, Muralikrishnan Balakrishnan, Insik Jin
  • Patent number: 8004875
    Abstract: A data storage device and associated method for providing current magnitude compensation for memory cells in a data storage array. In accordance with some embodiments, unit cells are connected between spaced apart first and second control lines of common length. An equalization circuit is configured to respectively apply a common current magnitude through each of the unit cells by adjusting a voltage applied to the cells in relation to a location of each of the cells along the first and second control lines.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: August 23, 2011
    Assignee: Seagate Technology LLC
    Inventors: Markus Jan Peter Siegert, Michael Xuefei Tang, Andrew John Carter, Alan Xuguang Wang
  • Publication number: 20110007544
    Abstract: A non-volatile memory cell and method of use therefore are disclosed. In accordance with various embodiments, the memory cell comprises a tunneling region disposed between a conducting region and a metal region, wherein the tunneling region comprises an active interface region disposed between a first tunneling barrier and a second tunneling barrier. A high resistive film is formed in the active interface region with migration of ions from both the metal and conducting regions responsive to a write current to program the memory cell to a selected resistive state.
    Type: Application
    Filed: July 13, 2009
    Publication date: January 13, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Venugopalan Vaithyanathan, Markus Jan Peter Siegert, Wei Tian, Muralikrishnan Balakrishnan, Insik Jin
  • Publication number: 20110007550
    Abstract: A data storage device and associated method for providing current magnitude compensation for memory cells in a data storage array. In accordance with some embodiments, unit cells are connected between spaced apart first and second control lines of common length. An equalization circuit is configured to respectively apply a common current magnitude through each of the unit cells by adjusting a voltage applied to the cells in relation to a location of each of the cells along the first and second control lines.
    Type: Application
    Filed: July 13, 2009
    Publication date: January 13, 2011
    Applicant: Seagate Technology LLC
    Inventors: Markus Jan Peter Siegert, Michael Xuefei Tang, Andrew John Carter, Alan Xuguang Wang
  • Patent number: 7869335
    Abstract: An apparatus includes a first ferroelectric storage layer and a second ferroelectric storage layer adjacent the first ferroelectric storage layer. A coupling layer may be between the first ferroelectric storage layer and the second ferroelectric storage layer. The ferroelectric storage layers may be configured as a data storage medium for use in a data storage system. A related method is also disclosed.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: January 11, 2011
    Assignee: Seagate Technology LLC
    Inventors: Markus Jan Peter Siegert, Andreas Karl Roelofs, Martin Gerard Forrester
  • Patent number: 7813254
    Abstract: An apparatus comprises mechanically scanned ferroelectric data storage media. A scanning electrode contacts the scannable surface with a contact force. The ferroelectric data storage media generates a piezoelectric potential that is picked up by the electrode. The piezoelectric potential has a polarity that varies as a function of data polarity on the data storage media.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: October 12, 2010
    Assignee: Seagate Technology LLC
    Inventors: Markus Jan Peter Siegert, Andreas Karl Roelofs, Martin Gerard Forrester
  • Publication number: 20090092032
    Abstract: An apparatus includes a first ferroelectric storage layer and a second ferroelectric storage layer adjacent the first ferroelectric storage layer. A coupling layer may be between the first ferroelectric storage layer and the second ferroelectric storage layer. The ferroelectric storage layers may be configured as a data storage medium for use in a data storage system. A related method is also disclosed.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 9, 2009
    Applicant: Seagate Technology LLC
    Inventors: Markus Jan Peter Siegert, Andreas Karl Roelofs, Martin Gerard Forrester
  • Publication number: 20080192528
    Abstract: An apparatus comprises mechanically scanned ferroelectric data storage media. A scanning electrode contacts the scannable surface with a contact force. The ferroelectric data storage media generates a piezoelectric potential that is picked up by the electrode. The piezoelectric potential has a polarity that varies as a function of data polarity on the data storage media.
    Type: Application
    Filed: February 8, 2007
    Publication date: August 14, 2008
    Applicant: Seagate Technology LLC
    Inventors: Markus Jan Peter Siegert, Andreas Karl Roelofs, Martin Gerard Forrester