Patents by Inventor Markus Kukiela

Markus Kukiela has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Clock phase compensator for multi-stage time division multiplexer
    Patent number: 9246616
    Abstract: An upstream multiplexer multiplexes data into first and second serialized data streams based on first and second low frequency clocks each derived from a high frequency clock. A downstream multiplexer multiplexes the first and second serialized data streams into a third serialized data stream based on the high frequency clock. A timing error detector derives an error signal indicative of a phase-misalignment between the high frequency clock and the first and second serialized data bit streams based on the high frequency clock and the first and second low frequency clocks. A phase adjuster adjusts phases of the first and second low frequency clocks relative to the high frequency clock based on the error signal so as to reduce the phase-misalignment.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: January 26, 2016
    Assignee: Cisco Technologies, Inc.
    Inventors: Juergen Hauenschild, Markus Kukiela
  • CLOCK PHASE COMPENSATOR FOR MULTI-STAGE TIME DIVISION MULTIPLEXER
    Publication number: 20150222379
    Abstract: An upstream multiplexer multiplexes data into first and second serialized data streams based on first and second low frequency clocks each derived from a high frequency clock. A downstream multiplexer multiplexes the first and second serialized data streams into a third serialized data stream based on the high frequency clock. A timing error detector derives an error signal indicative of a phase-misalignment between the high frequency clock and the first and second serialized data bit streams based on the high frequency clock and the first and second low frequency clocks. A phase adjuster adjusts phases of the first and second low frequency clocks relative to the high frequency clock based on the error signal so as to reduce the phase-misalignment.
    Type: Application
    Filed: February 6, 2014
    Publication date: August 6, 2015
    Applicant: Cisco Technology, Inc.
    Inventors: Juergen Hauenschild, Markus Kukiela