Patents by Inventor Markus Leicht
Markus Leicht has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9406592Abstract: A power semiconductor circuit includes at least one semiconductor having at least one contact area, and at least one bonding conductor strip having at least one contact region fastened on at least one of the contact areas. The contact region of the bonding conductor strip includes cutouts.Type: GrantFiled: June 10, 2015Date of Patent: August 2, 2016Assignee: CONTINENTAL AUTOMOTIVE GMBHInventors: Nico Kohl, Martin Metzler, Sven Egelkraut, Markus Leicht
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Publication number: 20150357303Abstract: A power semiconductor circuit includes at least one semiconductor having at least one contact area, and at least one bonding conductor strip having at least one contact region fastened on at least one of the contact areas. The contact region of the bonding conductor strip includes cutouts.Type: ApplicationFiled: June 10, 2015Publication date: December 10, 2015Applicant: CONTINENTAL AUTOMOTIVE GMBHInventors: Nico Kohl, Martin Metzler, Sven Egelkraut, Markus Leicht
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Patent number: 8399995Abstract: A semiconductor device includes a chip. The chip includes a single circuit element formed in a semiconductor substrate, a first metal layer on a first face of the semiconductor substrate, and a second metal layer on a second face of the semiconductor substrate opposite the first face. The first metal layer and the second metal layer are configured for accessing the single circuit element. A smaller of a first width of the first face of the semiconductor substrate and a second width of the first face of the semiconductor substrate perpendicular to the first width is less than or equal to a distance between an exposed face of the first metal layer parallel to the first face of the semiconductor substrate and an exposed face of the second metal layer parallel to the second face of the semiconductor substrate.Type: GrantFiled: January 16, 2009Date of Patent: March 19, 2013Assignee: Infineon Technologies AGInventors: Thorsten Scharf, Horst Theuss, Markus Leicht
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Patent number: 8156643Abstract: A method of electrically interconnecting a semiconductor chip to another electronic device including providing a carrier including contact pins and a chip attached to the carrier, the chip having a copper contact pad that faces away from the carrier, extending a copper electrical connector between the contact pins and the contact pad, and diffusion soldering the copper electrical connector to the active area with a solder material including tin to form a solder connection including a contiguous bronze coating disposed between and in direct contact with both the copper electrical connector and the contact pad.Type: GrantFiled: January 19, 2011Date of Patent: April 17, 2012Assignee: Infineon Technologies AGInventors: Manfred Schneegans, Markus Leicht, Stefan Woehlert, Edmund Riedl
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Patent number: 8097918Abstract: A semiconductor arrangement including a load transistor and a sense transistor that are integrated in a semiconductor body. One embodiment provides a number of transistor cells integrated in the semiconductor body, each transistor cell including a first active transistor region. A number of first contact electrodes, each of the contact electrodes contacting the first active transistor regions through contact plugs. A second contact electrode contacts a first group of the first contact electrodes, but not contacting a second group of the first contact electrodes. The transistor cells being contacted by first contact electrodes of the first group form a load transistor, with the second electrode forming a load terminal of the load transistor. The transistor cells being contacted by first contact electrodes of the second group form a sense transistor.Type: GrantFiled: August 14, 2009Date of Patent: January 17, 2012Assignee: Infineon Technologies AGInventors: Christoph Kadow, Markus Leicht, Stefan Woehlert
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Publication number: 20110107595Abstract: A method of electrically interconnecting a semiconductor chip to another electronic device including providing a carrier including contact pins and a chip attached to the carrier, the chip having a copper contact pad that faces away from the carrier, extending a copper electrical connector between the contact pins and the contact pad, and diffusion soldering the copper electrical connector to the active area with a solder material including tin to form a solder connection including a contiguous bronze coating disposed between and in direct contact with both the copper electrical connector and the contact pad.Type: ApplicationFiled: January 19, 2011Publication date: May 12, 2011Applicant: INFINEON TECHNOLOGIES AGInventors: Manfred Schneegans, Markus Leicht, Stefan Woehlert, Edmund Riedl
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Patent number: 7911061Abstract: A semiconductor device includes a carrier, a chip including a first face having a contact area, where the chip is attached to the carrier such that the contact area faces away from the carrier, a copper connector configured for attachment to the contact area, and a solder material configured to couple the copper connector to the contact area.Type: GrantFiled: June 25, 2007Date of Patent: March 22, 2011Assignee: Infineon Technologies AGInventors: Manfred Schneegans, Markus Leicht, Stefan Wohlert, Edmund Riedl
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Publication number: 20110037126Abstract: A semiconductor arrangement including a load transistor and a sense transistor that are integrated in a semiconductor body. One embodiment provides a number of transistor cells integrated in the semiconductor body, each transistor cell including a first active transistor region. A number of first contact electrodes, each of the contact electrodes contacting the first active transistor regions through contact plugs. A second contact electrode contacts a first group of the first contact electrodes, but not contacting a second group of the first contact electrodes. The transistor cells being contacted by first contact electrodes of the first group form a load transistor, with the second electrode forming a load terminal of the load transistor. The transistor cells being contacted by first contact electrodes of the second group form a sense transistor.Type: ApplicationFiled: August 14, 2009Publication date: February 17, 2011Applicant: Infineon Technologies AGInventors: Christoph Kadow, Markus Leicht, Stefan Woehlert
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Publication number: 20100181687Abstract: A semiconductor device includes a chip. The chip includes a single circuit element formed in a semiconductor substrate, a first metal layer on a first face of the semiconductor substrate, and a second metal layer on a second face of the semiconductor substrate opposite the first face. The first metal layer and the second metal layer are configured for accessing the single circuit element. A smaller of a first width of the first face of the semiconductor substrate and a second width of the first face of the semiconductor substrate perpendicular to the first width is less than or equal to a distance between an exposed face of the first metal layer parallel to the first face of the semiconductor substrate and an exposed face of the second metal layer parallel to the second face of the semiconductor substrate.Type: ApplicationFiled: January 16, 2009Publication date: July 22, 2010Applicant: Infineon Technologies AGInventors: Thorsten Scharf, Horst Theuss, Markus Leicht
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Publication number: 20080315423Abstract: A semiconductor device includes a carrier, a chip including a first face having a contact area, where the chip is attached to the carrier such that the contact area faces away from the carrier, a copper connector configured for attachment to the contact area, and a solder material configured to couple the copper connector to the contact area.Type: ApplicationFiled: June 25, 2007Publication date: December 25, 2008Applicant: INFINEON TECHNOLOGIES AGInventors: Manfred Schneegans, Markus Leicht, Stefan Woehlert, Edmund Riedl