Abstract: An integrated circuit, IC, substrate including i) a reinforced fiber-free dielectric material; ii) a bridge element including iia) at least two electrically conductive terminals, iib) an electrical interconnection that electrically interconnects the at least two electrically conductive terminals, and iic) a dielectric protection material that encapsulates the electrical interconnection, wherein the bridge element is embedded in the reinforced fiber-free dielectric material, so that at least two components, when surface mounted to a first main surface of the IC substrate, are electrically connected to the at least two electrically conductive terminals, respectively; and iii) a redistribution layer, RDL, structure, arranged at a second main surface of the IC substrate being opposite to the first main surface, and electrically connectable by further electrical interconnections to the at least two components.

Abstract: An electronic package includes a layer stack having at least one electrically insulating layer structure and at least one patterned electrically conductive layer structure; a first component mounted at an upper surface of the layer stack; a first frame structure provided at the upper surface of the layer stack, the first frame structure surrounding at least partially the first component; a second component mounted at a lower surface of the layer stack; and at least one through connection extending at least partially from the upper surface of the layer stack to the lower surface of the layer stack. The first component and the second component are connected through the at least one through connection extending through the layer stack.

Abstract: An integrated circuit substrate for surface mounting an integrated circuit component thereon, wherein the integrated circuit substrate comprises a support structure having at least one hole, and at least two functional inlays placed inside said at least one hole side by side, wherein a pitch at an integrated circuit component mounting side of the integrated circuit substrate is not more than 150 ?m.

Abstract: A component carrier includes i) a stack, having at least one electrically insulating layer structure and at least one electrically conductive layer structure; ii) a bridge element configured for connecting at least two components one to each other, wherein the bridge element includes: a) at least one layer structure made of organic dielectric material, and b) at least one conductive wiring structure extending along a bridging direction, c) wherein, along a cross-section perpendicular to the bridging direction, the at least one conductive wiring structure has at least two lateral walls, both inclined with respect to the stack thickness direction.

Abstract: A package includes a component carrier having a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure. The at least one electrically conductive layer structure includes at least one carrier pad. An electronic component assembled with the component carrier has at least one component pad. A connection structure electromechanically connects the at least one carrier pad with the at least one component pad by micro- and/or nanostructures, wherein the micro- and/or nanostructures are made of the same material as the at least one carrier pad and/or the at least one component pad.

Abstract: An electronic device comprising: a semiconductor element having connection pads, a redistribution layer coupled to the semiconductor element, a component carrier, and at least one functional element. The redistribution layer comprises: a first main surface associated to the semiconductor element, a second main surface opposite the first main surface first pads exposed on the first main surface and electrically connected to the connection pads and second pads exposed at the second main surface. The component carrier is coupled to the redistribution layer-structure and has at least one insulating layer, and at least one conductive layer structure. The at least one conductive layer structure is electrically connected to the second pads. The at least one functional element is arranged in or on the component carrier.

Abstract: A method includes forming a layer stack with at least one electrically insulating layer structure and at least one patterned electrically conductive layer structure on a temporary carrier, the layer stack includes a lower surface adjoining the temporary carrier and an upper surface opposite to the lower surface; mounting a first component at the upper surface; placing a first frame structure at the upper surface, the first frame structure surrounding at least partially the first component; covering the first component with a first coating material, the first coating material spatially extending at least partially into voids at or within the first frame structure and into voids at or within the layer stack; and removing the temporary carrier. The lower surface of the layer stack is an even surface. The opposite upper surface of the layer stack is an uneven surface. An electronic package can be manufactured with the described method.

Abstract: A component carrier includes a stack with electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures have a higher density connection region and a lower density connection region, and a first component and a second component which are surface mounted on the stack. The first component and the second component are electrically coupled with each other by the higher density connection region.

Abstract: A component carrier includes a stack with electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures have a higher density connection region and a lower density connection region, and a first component and a second component which are surface-mounted on the stack. The first component and the second component are electrically coupled with each other by the higher density connection region.

Abstract: A method for manufacturing a component carrier includes i) providing a metal layer, in particular a copper layer; ii) forming a film on the metal layer; iii) patterning the film in order to expose a part of the metal layer; iv) carrying out a first etch, thereby thinning the film and removing a further part of the exposed metal layer; and thereafter v) carrying out a second etch, thereby forming at least one metal trace that is spatially separated from the metal layer. A component carrier made by the method is further described.

Abstract: An integrated circuit substrate for surface mounting an integrated circuit component thereon, wherein the integrated circuit substrate comprises a central section, and at least two vertically stacked functional volume sections in the central section, wherein a pitch at an integrated circuit component mounting side of the integrated circuit substrate is not more than 150 ?m.

Abstract: A package comprising an integrated circuit substrate having an exposed substrate pad and having an exposed substrate dielectric, and an electronic component having an integrated circuit, having an exposed component pad and having an exposed component dielectric, wherein the integrated circuit substrate is connected with the electronic component so that there is a direct physical contact between the substrate pad and the component pad and so that there is a direct physical contact between the substrate dielectric and the component dielectric.

Abstract: An integrated circuit substrate for surface mounting an integrated circuit component thereon, wherein the integrated circuit substrate comprises a support structure having at least one hole, and at least two functional inlays placed inside said at least one hole side by side, wherein a pitch at an integrated circuit component mounting side of the integrated circuit substrate is not more than 150 ?m.

Abstract: A component carrier includes a stack with at least one electrically insulating layer structure and electrically conductive layer structures some of which have a first density of trace structures and a second density of connection structures, and a further stack with at least one further electrically insulating layer structure and further electrically conductive layer structures some of which have a third density of further trace structures and a fourth density of further connection structures. A first component is applied to the stack and a second component is embedded in the further stack. The connection structures are respectively connected to the further connection structures. The first density of trace structures is lower than the third density of further trace structures. The stack and the further stack are connected with each other by the connection structures and by the further connection structures. The first component is connected to the second component.

Abstract: A component carrier including a stack having at least one electrically conductive layer structure and a plurality of electrically insulating layer structures. Methods are presented for manufacturing the component carrier where the at least one electrically conductive layer structure is arranged with a vertical connection structure continuously extending vertically through at least two of the plurality of electrically insulating layer structures.

Abstract: A component carrier includes a first stack with an electrically insulating layer structure and an electrically conductive layer structure with a first density of trace structures and a second density of first connection structures, a second stack with a second electrically insulating layer structure and a second electrically conductive layer structure with a third density of second trace structures and a fourth density of second connection structures. A first component is applied to the first stack and a second component is embedded in the second stack. The first connection structures are respectively connected to the second connection structures. The first density of first trace structures is lower than the third density of second trace structures. The first stack and the second stack are connected with each other by the first connection structures and by the second connection structures. The first component is connected to the second component.

Abstract: A component carrier which includes a stack having at least one electrically conductive layer structure, at least one electrically insulating layer structure, and a recess being at least partially formed in the stack, optionally having an electrically conductive coating, and being configured as waveguide, wherein a plurality of edges delimiting the recess are formed by electrically conductive material of the at least one electrically conductive layer structure and/or of the optional electrically conductive coating.

Abstract: The present invention provides a compound semiconductor layered structure comprising: a semiconductor substrate having a bottom surface and a top surface; and a compound semiconductor film on top of said semiconductor substrate, said compound semiconductor film comprising a porous, polycrystalline bottom layer in direct contact with said top surface of said semiconductor substrate, and methods of making the same.

Abstract: The present invention provides compound semiconductor layered structures comprising a semiconductor substrate having a bottom layer and a top layer; and a semiconductor film on top of said semiconductor substrate, said semiconductor film comprising a bottom layer, a core and a top layer, whereby said bottom layer of said semiconductor film is in contact with said top surface of said semiconductor substrate, and wherein said top layer is nonporous. Preferred compound semiconductors further comprise a semiconductor overlayer having a bottom surface layer and a top surface layer, whereby said bottom surface layer of said second semiconductor layer is in contact with said top layer of said semiconductor film. The present invention also provides process for preparing the same.

Abstract: A component carrier includes a stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure and a through hole. An interposer is located in the through hole and has a higher density of connection elements than the stack. A first component is mounted on a first main surface of the interposer and a second component is mounted on a second main surface of the interposer. The first component and the second component are connected via the interposer.