Abstract: A custom application-specific integrated circuit (ASIC) may provide strong signal integrity while reducing the load to a thermal system. Control and analog-to-digital conversion may be pushed into components close to the detector to maximize signal integrity. Processing functions may be performed at relatively high temperature, or the highest allowable temperatures, simplifying the system-level thermal design by not cooling components that do not require such cooling to function.

Abstract: A custom application-specific integrated circuit (ASIC) may provide strong signal integrity while reducing the load to a thermal system. Control and analog-to-digital conversion may be pushed into components close to the detector to maximize signal integrity. Processing functions may be performed at relatively high temperature, or the highest allowable temperatures, simplifying the system-level thermal design by not cooling components that do not require such cooling to function.

Abstract: Apparatus and methods for synchronizing a plurality of image sensors in a video camera system. In one embodiment, a method includes generating a video sync signal, and resetting at least one internal clock divider in each image sensor in synchronization with the video sync signal at the beginning of each video frame. Another embodiment of a method of synchronizing a plurality of image sensors in a video camera system includes detecting a phase state of a signal of at least one internal clock divider in each sensor, wherein the phase state is relative to a system sync signal, and selecting a video output signal for each sensor based on the detected phase state of the at least one internal divider. In a third embodiment, the method includes asserting an asynchronous reset signal, stopping the system clocks in the system, de-asserting the asynchronous reset signal, while the system clocks are stopped, and restarting the system clocks.

Abstract: Multiple scanning modes are provided for an array of electromagnetic radiation sensors. In the preferred implementation both selectable subarrays and the overall array can be read out and reset in any desired order, including interrupting a full array scan for a subarray scan and then resuming the full array scan.

Abstract: Multiple scanning modes are provided for an array of electromagnetic radiation sensors. In the preferred implementation both selectable subarrays and the overall array can be read out and reset in any desired order, including interrupting a full array scan for a subarray scan and then resuming the full array scan.

Abstract: A column amplifier architecture having automatic gain selection for CMOS image sensors, which reduces the effect of analog noise, while maintaining a system's dynamic range. A comparator compares an amplified column buffer output signal to a reference voltage. The output of the comparator controls the gain of the amplifier based on the result of the comparison. Initially, a high column buffer gain is selected. For small signals, the output of the column buffer stays below the reference voltage and the output signal stays within the system's dynamic range. For larger signals, the column buffer output will exceed the reference voltage (and also the system's dynamic range) and therefore the comparator output switches states, which selects the low-gain setting. Multiple gain levels may be implemented, if desired.

Abstract: An image sensing system includes an image sensor and a black clamping circuit which reside on the same substrate. Particular embodiments use common components for both imaging and black clamping, and digital control of an analog black clamp function.

Abstract: A column amplifier architecture having automatic gain selection for CMOS image sensors, which reduces the effect of analog noise, while maintaining a system's dynamic range. A comparator compares an amplified column buffer output signal to a reference voltage. The output of the comparator controls the gain of the amplifier based on the result of the comparison. Initially, a high column buffer gain is selected. For small signals, the output of the column buffer stays below the reference voltage and the output signal stays within the system's dynamic range. For larger signals, the column buffer output will exceed the reference voltage (and also the system's dynamic range) and therefore the comparator output switches states, which selects the low-gain setting. Multiple gain levels may be implemented, if desired.

Abstract: A CMOS imager system including an active pixel sensor having an access supply which provides distributed feedback, a column buffer (having gain and FPN suppression), and an A/D converter co-located with the sensor such that the effective transmission path between the column buffer (or optional analog PGA) and the A/D converter acts as a resistor, rather than a reactance. The system may further include both an analog gain amplifier stage and a digital programmable amplifier stage.

Abstract: A CMOS imager system comprising an active pixel sensor having an access supply which provides distributed feedback, a column buffer (having gain and FPN suppression), and an A/D converter co-located with the sensor such that the effective transmission path between the column buffer (or optional analog PGA) and the A/D converter acts as a resistor, rather than a reactance. The system may further include both an analog gain amplifier stage and a digital programmable amplifier stage.

Abstract: A digital programmable gain stage for adjusting the gain of an input signal. A fine gain adjustment circuit sets gains between 1 and 2 (0-6 dB). A coarse gain adjustment stage adjusts the gain by multiples of 2. An input signal is multiplied by the fine gain adjustment factor, and then the coarse gain adjustment stage multiplies or divides the result by a multiple of 2. This architecture allows for gain adjustments from −24 dB to +66 dB in steps of 0.006 dB, using 14 bit resolution. Any number of gain ranges and gain resolutions are feasible with the current design by changing the bit width of the individual components.

Abstract: An image sensing system includes an image sensor and a black clamping circuit which reside on the same substrate. Particular embodiments use common components for both imaging and black clamping, and digital control of an analog black clamp function.

Abstract: Individual pixel reset circuits for an array of electromagnetic radiation sensors include a reset transistor connected to enable a reset of the pixel's sensor, and a logic gate connected to activate the reset transistor in response to a plurality of array reset signals. The logic gate can be implemented with only three transistors, and enables the selection of individual pixels for reset.

Abstract: Multiple scanning modes are provided for an array of electromagnetic radiation sensors. In the preferred implementation both selectable subarrays and the overall array can be read out and reset in any desired order, including interrupting a full array scan for a subarray scan and then resuming the full array scan.

Abstract: A photodetector array includes a plurality of photodetectors, preferably photodiodes, coupled to a respective plurality of addressable interface circuits. At each pixel, a switching circuit configures neighboring ones of the photodetectors into pixels by summing multiple photodetector signals into an aggregated pixel output signal. The switching circuit is electronically switchable to aggregate said photodetector signals according to at least two different selectable pixellization schemes with differing resolution.