Patents by Inventor Markus Ottowitz
Markus Ottowitz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11088009Abstract: According to various embodiments, a support table may include: a baseplate including a support structure, the support structure defining a support region over the baseplate to support at least one of a workpiece or a workpiece carrier therein; and one or more light-emitting components disposed between the baseplate and the support region. The one or more light-emitting components are configured to emit light into the support region.Type: GrantFiled: July 17, 2019Date of Patent: August 10, 2021Assignee: Infineon Technologies AGInventors: Bernhard Goller, Walter Leitgeb, Daniel Brunner, Lukas Ferlan, Markus Ottowitz
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Publication number: 20200027774Abstract: According to various embodiments, a support table may include: a baseplate including a support structure, the support structure defining a support region over the baseplate to support at least one of a workpiece or a workpiece carrier therein; and one or more light-emitting components disposed between the baseplate and the support region. The one or more light-emitting components are configured to emit light into the support region.Type: ApplicationFiled: July 17, 2019Publication date: January 23, 2020Inventors: Bernhard Goller, Walter Leitgeb, Daniel Brunner, Lukas Ferlan, Markus Ottowitz
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Patent number: 10431471Abstract: Various embodiments provide a method of planarizing a semiconductor wafer, wherein the method comprises providing a semiconductor wafer comprising a surface; and forming a mask layer on the surface of the semiconductor wafer, wherein a thickness of the mask layer is smaller in thinning areas, which are to be thinned for planarizing, than in areas which are not to be thinned for planarizing.Type: GrantFiled: April 25, 2016Date of Patent: October 1, 2019Assignee: Infineon Technologies AGInventors: Carsten Von Koblinski, Markus Ottowitz, Andreas Riegler
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Patent number: 9748140Abstract: A method for use in manufacturing semiconductor devices includes providing a wafer on a support, covering a central wafer portion of the wafer, and cutting a marginal wafer portion of the wafer from the wafer. According to an embodiment of an apparatus, the apparatus includes a support configured to support a wafer, a masking device configured to cover a central wafer portion of the wafer, and a cutting device configured to cut a marginal wafer portion of the wafer from the wafer.Type: GrantFiled: May 13, 2016Date of Patent: August 29, 2017Assignee: Infineon Technologies AGInventors: Ursula Hedenig, Markus Ottowitz, Thomas Grille, Carsten von Koblinski
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Publication number: 20160315154Abstract: Various embodiments provide a method of planarizing a semiconductor wafer, wherein the method comprises providing a semiconductor wafer comprising a surface; and forming a mask layer on the surface of the semiconductor wafer, wherein a thickness of the mask layer is smaller in thinning areas, which are to be thinned for planarizing, than in areas which are not to be thinned for planarizing.Type: ApplicationFiled: April 25, 2016Publication date: October 27, 2016Inventors: Carsten VON KOBLINSKI, Markus OTTOWITZ, Andreas RIEGLER
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Patent number: 9117801Abstract: A method for manufacturing semiconductor devices includes providing a stack having a semiconductor wafer and a glass substrate with openings and at least one trench attached to the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor devices. The openings of the glass substrate leave respective areas of the semiconductor devices uncovered by the glass substrate and the trench connects the openings. A metal layer is formed at least on exposed walls of the trench and the openings and on the uncovered areas of the semiconductor devices of the semiconductor wafer. A metal region is formed by electroplating metal in the openings and the trench and by subsequently grinding the glass substrate to remove the trenches. The stack of the semiconductor wafer and the attached glass substrate is cut to separate the semiconductor devices.Type: GrantFiled: May 15, 2013Date of Patent: August 25, 2015Assignee: Infineon Technologies AGInventors: Carsten von Koblinski, Ulrike Fastner, Peter Zorn, Markus Ottowitz
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Publication number: 20140339694Abstract: A method for manufacturing semiconductor devices includes providing a stack having a semiconductor wafer and a glass substrate with openings and at least one trench attached to the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor devices. The openings of the glass substrate leave respective areas of the semiconductor devices uncovered by the glass substrate and the trench connects the openings. A metal layer is formed at least on exposed walls of the trench and the openings and on the uncovered areas of the semiconductor devices of the semiconductor wafer. A metal region is formed by electroplating metal in the openings and the trench and by subsequently grinding the glass substrate to remove the trenches. The stack of the semiconductor wafer and the attached glass substrate is cut to separate the semiconductor devices.Type: ApplicationFiled: May 15, 2013Publication date: November 20, 2014Inventors: Carsten von Koblinski, Ulrike Fastner, Peter Zorn, Markus Ottowitz
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Patent number: 8865522Abstract: A method for connecting a semiconductor chip to a metal layer of a carrier substrate is disclosed. A semiconductor chip is provided which has a first side, a second side opposite the first side, a glass substrate bonded to the second side of the semiconductor chip and including at least one opening leaving an area of the second side of the semiconductor chip uncovered by the glass substrate, and a metallization region arranged in the opening of the glass substrate and electrically contacting the second side of the semiconductor chip. The semiconductor chip with the bonded glass substrate is brought onto a metal layer of a carrier substrate. A firm mechanical and electrical connection is formed between the metal layer of the carrier substrate and the metallization region.Type: GrantFiled: April 18, 2013Date of Patent: October 21, 2014Assignee: Infineon Technologies Austria AGInventors: Carsten von Koblinski, Gerald Lackner, Karin Schrettlinger, Markus Ottowitz
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Patent number: 8803312Abstract: A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallization region is formed on the machined second surface of the semiconductor wafer.Type: GrantFiled: August 14, 2013Date of Patent: August 12, 2014Assignee: Infineon Technologies Austria AGInventors: Carsten von Koblinski, Gerald Lackner, Karin Schrettlinger, Markus Ottowitz
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Publication number: 20130328183Abstract: A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallisation region is formed on the machined second surface of the semiconductor wafer.Type: ApplicationFiled: August 14, 2013Publication date: December 12, 2013Applicant: Infineon Technologies Austria AGInventors: Carsten von Koblinski, Gerald Lackner, Karin Schrettlinger, Markus Ottowitz
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Patent number: 8546934Abstract: A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallisation region is formed on the machined second surface of the semiconductor wafer.Type: GrantFiled: June 13, 2012Date of Patent: October 1, 2013Assignee: Infineon Technologies Austria AGInventors: Carsten Von Koblinski, Gerald Lackner, Karin Schrettlinger, Markus Ottowitz
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Publication number: 20130228905Abstract: A method for connecting a semiconductor chip to a metal layer of a carrier substrate is disclosed. A semiconductor chip is provided which has a first side, a second side opposite the first side, a glass substrate bonded to the second side of the semiconductor chip and including at least one opening leaving an area of the second side of the semiconductor chip uncovered by the glass substrate, and a metallisation region arranged in the opening of the glass substrate and electrically contacting the second side of the semiconductor chip. The semiconductor chip with the bonded glass substrate is brought onto a metal layer of a carrier substrate. A firm mechanical and electrical connection is formed between the metal layer of the carrier substrate and the metallisation region.Type: ApplicationFiled: April 18, 2013Publication date: September 5, 2013Applicant: Infineon Technologies Austria AGInventors: Carsten von Koblinski, Gerald Lackner, Karin Schrettlinger, Markus Ottowitz
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Publication number: 20120248631Abstract: A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallisation region is formed on the machined second surface of the semiconductor wafer.Type: ApplicationFiled: June 13, 2012Publication date: October 4, 2012Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Carsten Von Koblinski, Gerald Lackner, Karin Schrettlinger, Markus Ottowitz
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Patent number: 8202786Abstract: A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallization region is formed on the machined second surface of the semiconductor wafer.Type: GrantFiled: July 15, 2010Date of Patent: June 19, 2012Assignee: Infineon Technologies Austria AGInventors: Carsten Von Koblinski, Gerald Lackner, Karin Schrettlinger, Markus Ottowitz
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Publication number: 20120012994Abstract: A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallisation region is formed on the machined second surface of the semiconductor wafer.Type: ApplicationFiled: July 15, 2010Publication date: January 19, 2012Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Carsten Von Koblinski, Gerald Lackner, Karin Schrettlinger, Markus Ottowitz