Abstract: A process identifier transition monitor captures and assesses activities associated with a microprocessor or a microcontroller. Monitoring and assessment is performed by detection of process identifier transitions, which may be driven by an occurrence of one or more activities, such as execution of application software, system hardware mechanisms, or processor-internal mechanisms. Process identifier transitions are assessed to determine whether such transitions were expected. If a detected process identifier transition was not expected, then a system alert may be transmitted or some other appropriate response taken within the system.

Abstract: A process identifier transition monitor captures and assesses activities associated with a microprocessor or a microcontroller. Monitoring and assessment is performed by detection of process identifier transitions, which may be driven by an occurrence of one or more activities, such as execution of application software, system hardware mechanisms, or processor-internal mechanisms. Process identifier transitions are assessed to determine whether such transitions were expected. If a detected process identifier transition was not expected, then a system alert may be transmitted or some other appropriate response taken within the system.

Abstract: A circuit includes a one-time programmable (OTP) storage element configured to store a first logic value, an access delay timer configured to initiate a timer in response to a reset event with a timer value, and an access control circuit coupled to the access delay timer and the OTP storage element. The access control circuit is configured to count a number of access requests to the OTP storage element granted by the access control circuit and to store the number of granted access requests to the OTP storage element as a count value. The access control circuit is also configured to grant access to the OTP storage element in response to an access request only when the timer has expired and the count value is less than a predetermined count threshold.

Abstract: A method, system, and apparatus are provided for preventing glitch attacks by using a glitch processing hardware unit (1) to deactivate a glitch filter connected between the monitored line and a reset processing unit in response to detecting a voltage glitch on a monitored line during a specified security system sequence and (2) to automatically drive a requested reaction in response to the voltage glitch by driving one of a plurality of configurable reactions comprising a device reset reaction and a process restart request, thereby preventing the voltage glitch from maliciously influencing the specified security system sequence.

Abstract: A process identifier transition monitor captures and assesses activities associated with a microprocessor or a microcontroller. Monitoring and assessment is performed by detection of process identifier transitions, which may be driven by an occurrence of one or more activities, such as execution of application software, system hardware mechanisms, or processor-internal mechanisms. Process identifier transitions are assessed to determine whether such transitions were expected. If a detected process identifier transition was not expected, then a system alert may be transmitted or some other appropriate response taken within the system.

Abstract: Various embodiments relate to a circuit, including: a first secure circuit configured to receive an input and to produce a first output; a first delay circuit configured to receive the first output and to produce a first delayed output delayed by a time N; a second delay circuit configured to receive the input and to produce a delayed input delayed by a time N; a second secure circuit configured to receive the delayed input and to produce a second delayed output; and a comparator configured to compare the first delayed output to the second delayed output and to produce a result, wherein the result is one of the first delayed output or second delayed output when the first delayed output matches the second delayed output and the result is an error value when the first delayed output does not match the second delayed output.

Abstract: A method, system, and apparatus are provided for preventing glitch attacks by using a glitch processing hardware unit (1) to deactivate a glitch filter connected between the monitored line and a reset processing unit in response to detecting a voltage glitch on a monitored line during a specified security system sequence and (2) to automatically drive a requested reaction in response to the voltage glitch by driving one of a plurality of configurable reactions comprising a device reset reaction and a process restart request, thereby preventing the voltage glitch from maliciously influencing the specified security system sequence.

Abstract: Transistor-based semiconductor devices, such as systems on chips, may be supplemented with a reset request mechanism to prevent a reset from causing the semiconductor device to enter into an uncertain, or fail, state. More particularly, a method or mechanism may modify a requested reset for a semiconductor device based on a state of the semiconductor device to prevent the semiconductor device from entering an uncertain, an undesired, or a failed state when the reset is effected with regard to the semiconductor device.

Abstract: A processing apparatus, comprising at least a first processing unit and a second processing unit, is proposed. The first processing unit comprises a set of first stateful elements, the second processing unit comprises a set of second stateful elements. A set of synchronization data lines may connect the first stateful elements to the second stateful elements in a pairwise manner. A control unit may control the first processing unit, the second processing unit and the synchronization data lines so as to copy the states of the first stateful elements in parallel via the synchronization data lines to the second stateful elements in response to a synchronization request. A method of synchronizing the processing units is also proposed.

Abstract: IC device comprising a plurality of functional components arranged into self-test cells. The IC device is configurable into a first self-test configuration comprising a first set of self-test partitions. Each self-test partition within the first set comprising at least one self-test cell. Functional components of the self-test cell(s) of each self-test partition within the first set are arranged to be configured into at least one scan-chain for said self-test partition when the IC device is configured into the first self-test configuration. The IC device is configurable into a second self-test configuration comprising a second set of self-test partitions. Each self-test partition within the second set comprising at least one self-test cell. Functional components of the self-test cell(s) of each self-test partition within the second set are arranged to be configured into at least one scan-chain for said self-test partition when the IC device is configured into the second self-test configuration.

Abstract: The present application relates to a method and a processing system for automated managing of the usage of alternative code. Code sections including original code and alternative code are retrieved from a code basis and the retrieved code is analyzed to detect an alternative code section. A condition definition associated with the identified alternative code section is further retrieved and the condition of the retrieved condition definition is evaluated. The identified alternative code section is activated in accordance with the evaluation result.

Abstract: IC device comprising a plurality of functional components arranged into self-test cells. The IC device is configurable into a first self-test configuration comprising a first set of self-test partitions. Each self-test partition within the first set comprising at least one self-test cell. Functional components of the self-test cell(s) of each self-test partition within the first set are arranged to be configured into at least one scan-chain for said self-test partition when the IC device is configured into the first self-test configuration. The IC device is configurable into a second self-test configuration comprising a second set of self-test partitions. Each self-test partition within the second set comprising at least one self-test cell. Functional components of the self-test cell(s) of each self-test partition within the second set are arranged to be configured into at least one scan-chain for said self-test partition when the IC device is configured into the second self-test configuration.

Abstract: The present application relates to a method and a processing system for automated managing of the usage of alternative code. Code sections including original code and alternative code are retrieved from a code basis and the retrieved code is analyzed to detect an alternative code section. A condition definition associated with the identified alternative code section is further retrieved and the condition of the retrieved condition definition is evaluated. The identified alternative code section is activated in accordance with the evaluation result.

Abstract: An integrated circuit (IC) device, and method therefor, the IC device comprising a plurality of self-test components arranged to execute self-tests in parallel during a self-test execution phase of the IC device, and at least one clock control component arranged to provide at least one clock signal to the plurality of self-test components at least during the self-test execution phase of the IC device. The at least one clock control component is further arranged to receive at least one indication that self-testing has ceased within at least a first self-test component, and dynamically modulate the at least one clock signal provided to at least one further self-test component for which self-testing has not ceased to increase a clock rate of the at least one clock signal upon receipt of an indication that self-test execution has ceased within the at least first self-test component.

Abstract: A system-on-chip comprises a plurality of functional domains. The plurality of functional domains comprise a first domain and a second domain, the first domain having a first active mode of operation and the second domain having a second active mode of operation different from the first active mode of operation. The system-on-chip also comprises a control unit operably coupled to the first and second domains and capable of placing the first domain in the first active mode and the second domain in the second active mode so that the first domain is in the first active mode and the second domain is in the second active mode substantially contemporaneously. The first active mode of operation is functionally different from the second active mode of operation.

Abstract: A processing apparatus, comprising at least a first processing unit and a second processing unit, is proposed. The first processing unit comprises a set of first stateful elements, the second processing unit comprises a set of second stateful elements. A set of synchronization data lines may connect the first stateful elements to the second stateful elements in a pairwise manner. A control unit may control the first processing unit, the second processing unit and the synchronization data lines so as to copy the states of the first stateful elements in parallel via the synchronization data lines to the second stateful elements in response to a synchronization request. A method of synchronizing the processing units is also proposed.

Abstract: The device for the monitored loading of tablets into pockets in a web of plastic sheet for the production of blister packs comprises a transport device for conveying the plastic sheet and a feed unit for feeding the tablets into the pockets in the plastic sheet. The feed unit comprises a plurality of filling channels. Downstream from the feed unit, an inspection device is provided to verify that each individual pocket in the plastic sheet has been filled. A control unit actuates a lighting or beam-emitting device on the basis of the results acquired by the inspection device to visually identify any blocked filling channel.

Abstract: The device for dividing a transport stream consisting of one line of successively arranged upright containers into two partial transport streams, each partial transport stream consisting of one line of successively arranged upright containers, has a feed device for conveying the transport stream of containers, and two distribution lines arranged at an angle to each other, each of which serves to accept one of the partial transport streams of containers in a transfer area of the feed device, the feed device and the two distribution lines thus forming a Y-shaped intersection in the transfer area. At least one driven roller with a substantially vertical axis of rotation is arranged between the two distribution lines in the transfer area of the feed device.

Abstract: The device for dividing a transport stream consisting of one line of successively arranged upright containers into two partial transport streams, each partial transport stream consisting of one line of successively arranged upright containers, has a feed device for conveying the transport stream of containers, and two distribution lines arranged at an angle to each other, each of which serves to accept one of the partial transport streams of containers in a transfer area of the feed device, the feed device and the two distribution lines thus forming a Y-shaped intersection in the transfer area. At least one driven roller with a substantially vertical axis of rotation is arranged between the two distribution lines in the transfer area of the feed device.

Abstract: The feeder for tablets, capsules or dragées has a stationary base unit and an exchangeable format unit with a sorting plate for evenly distributing the products and with a filling unit including a number of vertically extending filling tubes having a guiding channel for receiving the tablets, capsules or dragées from the sorting plate, and a blocking slide unit for temporarily blocking the guiding channels of the filling tubes. The base unit has a first hanger device for the sorting plate, a second hanger device for the filling unit, and at least one adjusting device for adjusting the first hanger device relative to the second hanger device.