Abstract: A method and apparatus in which a radio frequency transceiver is controlled via a plurality of connectors including providing control information for changing a mode of operation of the receiver. The modes can be transmit and receive modes, and the connectors can be configured to perform various functions depending on the mode of operation. Control signals, time critical control signals, and other types of signals may be received at one or more of the connectors in the different modes of operation. The functions may control a power amplifier of a transmitter portion of the transceiver, read/write data from/to registers of the transceiver, and/or other functions.

Abstract: The present invention relates to a method and a device for data extraction from a data stream containing at least one data packet. First, comparing a bit stream derived from a received digital data stream with an expected bit sequence is performed by packet detector to determine a correlation value (CorrVal) for detecting a data packet. Then, a data extraction unit is started for data extraction when the correlation value (CorrVal) exceeds a threshold value (CorrThres) indicating that a data packet has been detected. Therefore, comparing the received bit stream with the expected bit sequence to determine a new correlation value (CorrVal) is continued by the packet detector. Finally, restarting data extraction is initiated by a sync-control module when the new correlation value (CorrVal) exceeds the form correlation value (MaxCorrVal).

Abstract: A transceiver for operating in a network wherein the transceiver is arranged to synchronize to a time reference common to the network having distinguishable instances, the transceiver containing a controller for effecting the reading or writing of a real time clock at an identified instance of the common time reference; a transmitter for transmitting an identification of the real time clock value of a first instance and an identification of the first instance, and a receiver for receiving a transmitted identification of a real time clock value and an identification of a first instance.

Abstract: There is disclosed a method for identifying the type of an RFID tag, comprising the steps of receiving encrypted data from said RFID tag, decrypting said data by at least one decryption method, evaluating if said data has been correctly decrypted by said at least one decryption method, and in case said at least one decryption method has succeeded in decrypting said data, deriving a tag type from said decryption method. Further there is disclosed a device for identifying the type of an RFID tag, comprising a radio frequency identification tag reader for receiving data from a radio frequency identification tag, a decryptor for decrypting said data by at least one decryption method, the decryptor being suitable to evaluate if said data has been correctly decrypted by said at least one decryption method, and a data processing unit suitable to derive a tag type from said at least one decryption method and to generate a corresponding output.

Abstract: A method and apparatus in which a radio frequency transceiver is controlled via a plurality of connectors including providing control information for changing a mode of operation of the receiver. The modes can be transmit and receive modes, and the connectors can be configured to perform various functions depending on the mode of operation. Control signals, time critical control signals, and other types of signals may be received at one or more of the connectors in the different modes of operation. The functions may control a power amplifier of a transmitter portion of the transceiver, read/write data from/to registers of the transceiver, and/or other functions.

Abstract: The invention relates to a method and a device for identifying a data packet in a data stream, in which by means of a d.c. voltage quota determining circuit (30) the d.c. voltage quota (dc) for a demodulated digital input signal (Sin) is calculated, in which a k-bit word is allocated to the input signal (Sin), in that for each symbol of the input signal (Sin) corresponding to a bit a bit value (1 or 0) is determined by a decoding circuit (37) as a function of the d.c. voltage quota (dc), in which the k-bit word corresponding to the input signal (Sin) is compared by a comparison and correlation calculating circuit (41) with an expected k-bit synchronization word in order to determine a correlation value (cv) and in which a packet identification signal (Pd) is generated by a correlation value comparison circuit (43) if the correlation value (cv) is greater than a correlation threshold value (cth). Calculation of the d.c.

Abstract: An interface between base band circuitry and RF transceiver circuitry, particularly relating to the Bluetooth standard. The interface has a plurality of connectors (DBus) for controlling the RF transceiver circuitry including providing control information for changing the mode of operation of the transceiver, said modes including a transmit mode and a receive mode; at least first and second further connectors (RFBus) wherein in the transmit mode, one of said first and second connectors supplies data to the transceiver and the other is operable to perform a first function such as controlling the power amplifier in the RF circuitry and wherein, in the receive mode, one of said first and second connectors receives data from said RF module and the other is operable to perform a second function different from the first function.

Abstract: A method and a device for estimating the DC offset portion of a signal, especially of a signal containing parts with sinusoidal shape, for example a signal which results from demodulation of a frequency modulated receive signal. A method is presented for correcting the direct current offset portion (DC offset) of a first signal which includes phase shifting the first signal for obtaining a second signal and comparing the first signal and the second signal with an estimated DC offset. The estimated DC offset is adjusted if the result of the comparison is that the first signal and the second signal are on different sides of the estimated DC offset and the estimated DC offset remains constant as long as the result of the comparison is that the first signal and the second signal are on the same side of the estimated DC offset.

Abstract: A transmitter for transmitting an intermittent sequence of messages to maintain synchronization between the transmitter and a receiver. The transmitter includes control apparatus which provides messages for transmission, each message forms part of a sequence of messages and includes control information and timing information, and transmission apparatus which transmits each message. A receiver for synchronizing with a sequence of the transmitted messages. The receiver includes receiver and synchronization apparatus responsive, when enabled, to the control information in the message to indicate to the control apparatus reception of the message. The control apparatus controls power conservation by disabling the receiver and synchronization apparatus for a period of time dependent upon the timing information and enabling the receiver and synchronization apparatus to receive a following message in the sequence.

Abstract: The invention relates to a receiver arrangement for receiving frequency-modulated radio signals, having a demodulator circuit arrangement (18), which converts and intermediate-frequency signal into a voltage signal, which is applied to an input stage (22) of a signal-processing circuit arrangement (23), and having a clock-signal oscillator (26), which supplies a clock signal for generating a frequency signal for reducing the frequency of a received signal to the intermediate frequency, and relates to a method of adapting a receiving branch of the receiver arrangement to an input stage (22) of a signal-processing circuit arrangement (23) and a self-testing method. To allow the adaptation of the demodulator circuit arrangement to the downstream input stage of a signal-processing circuit arrangement to be carried out without external test signals, a test-signal generator stage (28) is provided, which forms a test signal with a known frequency from the clock signal supplied by the clock-signal oscillator (26).

Abstract: A transmitter, for controlling at least one receiver by intermittently transmitting groups of messages. The transmitter includes a controller arranged to provide intermittently groups of messages for transmission. Each of said groups includes a plurality of messages in series and separated by time intervals, wherein each of the plurality of messages in a group includes control information such that control of the receiver can be effected by reception of any one of the plurality of messages in the group. The invention increases the efficiency with which control messages can be transmitted without markedly increasing the power consumption of transceivers in a radio frequency network.

Abstract: An improved paging procedure for use in a low power radio communications network. A transceiver which pages a device by periodically transmitting a series of messages, comprises a transmitter which transmits a series of messages comprising a message at each frequency in a predetermined series of frequencies, a receiver which receives at, at least a predetermined frequency; and a controller which enables the transmitter and then the receiver in each of a plurality of successive periods and provides each message in said series of messages. The predetermined series of frequencies is an ordered series. A first message in the series of messages transmitted in a period defines directly or indirectly when the receiver is enabled and a second message in the series, a mark code, directly defines the predetermined frequency.

Abstract: The present invention relates to a method and a device for data extraction from a data stream containing at least one data packet. First, comparing a bit stream derived from a received digital data stream with an expected bit sequence is performed by packet detector (17) to determine a correlation value (CorrVal) for detecting a data packet. Then, a data extraction unit (19, 20, 21, 22) is started for data extraction when the correlation value (CorrVal) exceeds a threshold value (CorrThres) indicating that a data packet has been detected. Thereafter, comparing the received bit stream with the expected bit sequence to determine a new correlation value (CorrVal) is continued by the packet detector (17). Finally, restarting data extraction is initiated by a sync-control module (23) when the new correlation value (CorrVal) exceeds the former correlation value (MaxCorrVal).

Abstract: A receiver for receiving a radio packet transmitted at a transmission frequency. Reception circuitry is arranged to receive radio signals at a receiving frequency. The reception circuitry includes a phase locked loop arranged to maintain the receiving frequency substantially equal to the transmission frequency; a detector which detects within the received radio signals a pre-defined sequence identifying the beginning of a radio packet; and disabling circuitry which disables the phase locked loop after the receipt of the sequence of radio signals identifying the beginning of a radio packet.

Abstract: The invention relates to a method and a device for estimating the DC offset portion of a signal, especially of a signal containing parts with sinusoidal shaping, for example a signal which results from demodulation of a frequency modulated receive signal.

Abstract: The invention relates to a method for controlling a communications device which has a main operating unit (10) and a subunit (11). In order to ensure that as little energy as possible is consumed, the invention provides that, after an operating period, operating state data for the main unit (10) are stored in a status memory (18) in the subunit (11) and, after this, the voltage supply for the main operating unit (10) is switched off in order to change the communications device to an energy saving mode, and in that, after the voltage supply for the main operating unit (10) has been switched on, the stored operating state data are transmitted from the status memory (18) to the main operating unit (10) in order to operate the communications device during the following operating period.

Abstract: The invention relates to a method for controlling a communications device which has a main operating unit (10) and a subunit (11). In order to ensure that as little energy as possible is consumed, the invention provides that, after an operating period, operating state data for the main unit (10) are stored in a status memory (18) in the subunit (11) and, after this, the voltage supply for the main operating unit (10) is switched off in order to change the communications device to an energy saving mode, and in that, after the voltage supply for the main operating unit (10) has been switched on, the stored operating state data are transmitted from the status memory (18) to the main operating unit (10) in order to operate the communications device during the following operating period.

Abstract: The invention relates to a method and a device for identifying a data packet in a data stream, in which by means of a d.c. voltage quota determining circuit (30) the d.c. voltage quota (dc) for a demodulated digital input signal (Sin) is calculated, in which a k-bit word is allocated to the input signal (Sin), in that for each symbol of the input signal (Sin) corresponding to a bit a bit value (1 or 0) is determined by a decoding circuit (37) as a function of the d.c. voltage quota (dc), in which the k-bit word corresponding to the input signal (Sin) is compared by a comparison and correlation calculating circuit (41) with an expected k-bit synchronisation word in order to determine a correlation value (cv) and in which a packet identification signal (Pd) is generated by a correlation value comparison circuit (43) if the correlation value (cv) is greater than a correlation threshold value (cth). Calculation of the d.c.

Abstract: A transceiver for operating in a network wherein the transceiver is arranged to synchronize to a time reference common to the network having distinguishable instances comprising:

Abstract: The invention relates to a receiver arrangement for receiving frequency-modulated radio signals, having a demodulator circuit arrangement (18), which converts an intermediate-frequency signal into a voltage signal, which is applied to an input stage (22) of a signal-processing circuit arrangement (23), and having a clock-signal oscillator (26), which supplies a clock signal for generating a frequency signal for reducing the frequency of a received signal to the intermediate frequency, and relates to a method of adapting a receiving branch of the receiver arrangement to an input stage (22) of a signal-processing circuit arrangement (23) and a self-testing method.