Abstract: According to some embodiments, a load powering circuit includes a power circuit having a power semiconductor device, a mirror circuit connected to power semiconductor device and configured to generate a mirror current signal based on current flowing through the power semiconductor device, and a drain switch having an input connected to a drain of the power semiconductor device, and a driver circuit having an amplifier having a first input terminal and a second input terminal connected to the mirror circuit, and a gate control terminal connected to the power semiconductor device, the mirror circuit, and the drain switch, wherein the drain switch has an output connected to a negative reference terminal of the amplifier, and a voltage supply terminal is connected to a positive reference terminal of the amplifier.

Abstract: According to some embodiments, a load powering circuit includes a power circuit having a power semiconductor device, a mirror circuit connected to power semiconductor device and configured to generate a mirror current signal based on current flowing through the power semiconductor device, and a drain switch having an input connected to a drain of the power semiconductor device, and a driver circuit having an amplifier having a first input terminal and a second input terminal connected to the mirror circuit, and a gate control terminal connected to the power semiconductor device, the mirror circuit, and the drain switch, wherein the drain switch has an output connected to a negative reference terminal of the amplifier, and a voltage supply terminal is connected to a positive reference terminal of the amplifier.

Abstract: A gate driver circuit and a corresponding gate driver system is presented. The gate driver circuit may be configured to drive a gallium nitride GaN transistor. The gate driver circuit may comprise a communication interface configured to receive a gate driver parameter. The communication interface may be an asynchronous serial communication interface, such as e.g. an UART communication interface. The gate driver parameter may be forwarded from one gate driver circuit to the next using the asynchronous serial communication protocol. One or more digital isolators may be coupled between the gate driver circuits.

Abstract: A semiconductor device has an analogue-to-digital converter (ADC) driven by a plurality of analogue input channels, each having an input pad and an input node connected to the input pad. The input node is connected to an input of the ADC through a respective switch. The analogue input channels comprise a high-side clamp transistor connected between the input node and a high-side power rail, a high-side comparator to clamp the input node to a high-side clamp voltage when the voltage at the input node exceeds a high-side comparison voltage, a low-side clamp transistor connected between the input node and a low-side power rail, and a low-side comparator for turning on the low-side clamp transistor to clamp the input node to a low-side clamp voltage when the voltage at the input node falls below a low-side comparison voltage.