Patents by Inventor Marlon Moncrieffe

Marlon Moncrieffe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10254337
    Abstract: Systems, devices, and techniques relating to remote debugging are described. A described device includes a first processor core configured to provide an application execution environment, memory coupled with the first processor core; a second processor core configured to provide a secure execution environment; and a communication interface coupled with the first processor core and the second processor core, the communication interface being configured to communicate with external devices, the communication interface being shared at least between the application execution environment and the secure execution environment.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: April 9, 2019
    Assignee: Marvell World Trade Ltd.
    Inventors: Minda Zhang, Marlon Moncrieffe, Cesare Ferri
  • Publication number: 20170115350
    Abstract: Systems, devices, and techniques relating to remote debugging are described. A described device includes a first processor core configured to provide an application execution environment, memory coupled with the first processor core; a second processor core configured to provide a secure execution environment; and a communication interface coupled with the first processor core and the second processor core, the communication interface being configured to communicate with external devices, the communication interface being shared at least between the application execution environment and the secure execution environment.
    Type: Application
    Filed: October 25, 2016
    Publication date: April 27, 2017
    Inventors: Minda Zhang, Marlon Moncrieffe, Cesare Ferri
  • Patent number: 9442758
    Abstract: Dynamic processor core switching is described. In embodiments, a multi-core processor system can include a first processor core that executes computer instructions at a first processing rate, and can include at least a second processor core that executes the computer instructions at a second processing rate, where the second processing rate is different than the first processing rate. A core profiler can generate system profile data that is evaluated to determine when a core-switch manager initiates switching execution of the computer instructions from the first processor core to the second processor core while the computer instructions are being executed.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: September 13, 2016
    Assignee: Marvell International Ltd.
    Inventors: Premanand Sakarda, Scott B. Peirce, Jia Bao, Marlon Moncrieffe, Priya Vaidya, Michael D Rosenzweig, Minda Zhang, Palanisamy Mohanraj
  • Patent number: 8930728
    Abstract: Some of the embodiments of the present disclosure provide a method comprising generating a plurality of power profiles for a corresponding plurality of processing cores, wherein each power profile of the plurality of power profiles includes power consumptions of a corresponding processing core under various operating conditions; generating a plurality of candidate configurations, wherein each candidate configuration comprises corresponding candidate operating conditions for the plurality of processing cores; and based at least in part on the plurality of power profiles, selecting a first candidate configuration of the plurality of candidate configurations for managing the plurality of processing cores. Other embodiments are also described and claimed.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: January 6, 2015
    Assignee: Marvell International Ltd.
    Inventors: Yu Bai, Marlon Moncrieffe, Bryan Morgan, Scott B. Peirce, Premanand Sakarda
  • Patent number: 8689021
    Abstract: Some of the embodiments of the present disclosure provide a method comprising generating a plurality of power profiles for a corresponding plurality of processing cores, wherein each power profile of the plurality of power profiles includes power consumptions of a corresponding processing core under various operating conditions; generating a plurality of candidate configurations, wherein each candidate configuration comprises corresponding candidate operating conditions for the plurality of processing cores; and based at least in part on the plurality of power profiles, selecting a first candidate configuration of the plurality of candidate configurations for managing the plurality of processing cores. Other embodiments are also described and claimed.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: April 1, 2014
    Assignee: Marvell International Ltd.
    Inventors: Yu Bai, Marlon Moncrieffe, Bryan Morgan, Scott B. Peirce, Premanand Sakarda