Patents by Inventor Marojahan TAMPUBOLON

Marojahan TAMPUBOLON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10886394
    Abstract: A semiconductor structure includes a substrate having an active region and an isolation region, an insulating layer disposed on the substrate, a seed layer disposed on the insulating layer, a compound semiconductor layer disposed on the seed layer, a gate structure in the active region disposed on the compound semiconductor layer, an isolation structure in the isolation region disposed on the substrate, a pair of through-substrate vias in the isolation region disposed on the opposite sides of the gate structure, and a source structure and a drain structure disposed on the substrate and on the opposite sides of the gate structure. The pair of through-substrate vias pass through the isolation structure and contact the seed layer. The source structure and the drain structure electrically connect the seed layer by the pair of through-substrate vias.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: January 5, 2021
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shin-Cheng Lin, Wen-Hsin Lin, Marojahan Tampubolon
  • Publication number: 20200403090
    Abstract: A semiconductor structure includes a substrate having an active region and an isolation region, an insulating layer disposed on the substrate, a seed layer disposed on the insulating layer, a compound semiconductor layer disposed on the seed layer, a gate structure in the active region disposed on the compound semiconductor layer, an isolation structure in the isolation region disposed on the substrate, a pair of through-substrate vias in the isolation region disposed on the opposite sides of the gate structure, and a source structure and a drain structure disposed on the substrate and on the opposite sides of the gate structure. The pair of through-substrate vias pass through the isolation structure and contact the seed layer. The source structure and the drain structure electrically connect the seed layer by the pair of through-substrate vias.
    Type: Application
    Filed: June 19, 2019
    Publication date: December 24, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shin-Cheng LIN, Wen-Hsin LIN, Marojahan TAMPUBOLON