Patents by Inventor Marowen NG

Marowen NG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230100579
    Abstract: A nanopore cell may include a well having a seamless porous electrode and hydrophobic sidewalls. The seamless porous electrode may be formed by depositing porous electrode material on a planar electrode support layer formed by a conductive layer island and a dielectric layer. The porous electrode material may form uniform seamless columns and may be protected during manufacturing by depositing a selectably removable protective layer thereon. The well may be formed by forming and then patterning hydrophobic cladding over the protective layer. The protective layer may be removed to expose the seamless porous electrode at the bottom of the well.
    Type: Application
    Filed: November 23, 2022
    Publication date: March 30, 2023
    Inventors: John C. FOSTER, Kenneth A. HONER, Marowen NG
  • Publication number: 20210311017
    Abstract: Disclosed herein are ruthenium-containing materials, such as ruthenium containing materials having a double layer capacitance ranging from between about 180 pF/um2 to about 320 pF/um2. In some embodiments, the ruthenium-containing materials are suitable for use in electrodes. In some embodiments, the ruthenium-containing materials are suitable for use in nanopore sequencing devices.
    Type: Application
    Filed: February 25, 2021
    Publication date: October 7, 2021
    Inventors: Wing Kei Au, Jason Komadina, Marowen Ng
  • Publication number: 20210041392
    Abstract: A nanopore cell may include a well having a working electrode at a bottom of the well. The well may be formed within a dielectric layer, where the sidewalls of the well may be formed of the dielectric or other materials coating the walls of the dielectric layer. Various materials having different hydrophobicity and hydrophilicity can be used to provide desired properties of the cell. The nanopore in the nanopore cell can be inserted in a membrane formed over the well. Various techniques can be used for providing a desired shape and other properties e.g., of materials and processes for forming the well.
    Type: Application
    Filed: July 21, 2020
    Publication date: February 11, 2021
    Inventors: Wing Au, Guojun Chen, Ronald L. Cicero, John Foster, Kenneth A. Honer, Marowen Ng, Pirooz Parvarandeh
  • Patent number: 10739299
    Abstract: A nanopore cell may include a well having a working electrode at a bottom of the well. The well may be formed within a dielectric layer, where the sidewalls of the well may be formed of the dielectric or other materials coating the walls of the dielectric layer. Various materials having different hydrophobicity and hydrophilicity can be used to provide desired properties of the cell. The nanopore in the nanopore cell can be inserted in a membrane formed over the well. Various techniques can be used for providing a desired shape and other properties e.g., of materials and processes for forming the well.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: August 11, 2020
    Assignee: Roche Sequencing Solutions, Inc.
    Inventors: Ronald L. Cicero, Kenneth A. Honer, John Foster, Pirooz Parvarandeh, Marowen Ng, Wing Au, Guojun Chen
  • Publication number: 20180266980
    Abstract: A nanopore cell may include a well having a working electrode at a bottom of the well. The well may be formed within a dielectric layer, where the sidewalls of the well may be formed of the dielectric or other materials coating the walls of the dielectric layer. Various materials having different hydrophobicity and hydrophilicity can be used to provide desired properties of the cell. The nanopore in the nanopore cell can be inserted in a membrane formed over the well. Various techniques can be used for providing a desired shape and other properties e.g., of materials and processes for forming the well.
    Type: Application
    Filed: March 13, 2018
    Publication date: September 20, 2018
    Inventors: Ronald L. Cicero, Ken Honer, John Foster, Pirooz Parvarandeh, Marowen Ng, Wing Au, Guojun Chen
  • Patent number: 8895445
    Abstract: A method for forming vias and trenches for an interconnect structure on a substrate includes exposing via pitch reduction patterns in a photoresist layer, developing the patterns to remove the via pitch reduction patterns, etching the photoresist layer partially using a polymer gas to reshape the pattern into small via shapes, and etching the remaining photoresist layer to extend the reshaped pattern. The reshaped small via shape patterns have a smaller pitch than the via pitch reduction patterns in a long direction. For via pitch reduction patterns having two vias each, the pattern has a peanut-shape. During the reshaping etch operation, the polymer gas deposits more in a pinched-in middle section while allowing downward etch in unpinched sections.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: November 25, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Kuo Hsieh, Marowen Ng, Ming-Chung Liang, Hsin-Yi Tsai
  • Publication number: 20120149204
    Abstract: A method for forming vias and trenches for an interconnect structure on a substrate includes exposing via pitch reduction patterns in a photoresist layer, developing the patterns to remove the via pitch reduction patterns, etching the photoresist layer partially using a polymer gas to reshape the pattern into small via shapes, and etching the remaining photoresist layer to extend the reshaped pattern. The reshaped small via shape patterns have a smaller pitch than the via pitch reduction patterns in a long direction. For via pitch reduction patterns having two vias each, the pattern has a peanut-shape. During the reshaping etch operation, the polymer gas deposits more in a pinched-in middle section while allowing downward etch in unpinched sections.
    Type: Application
    Filed: September 8, 2011
    Publication date: June 14, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Kuo HSIEH, Marowen NG, Ming-Chung LIANG, Hsin-Yi TSAI