Patents by Inventor Marsela Pontoh
Marsela Pontoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240079338Abstract: Semiconductor die assemblies with decomposable materials, and associated methods and systems are disclosed. In an embodiment, a semiconductor die assembly includes a memory controller die carrying one or more memory dies attached to its first side. The semiconductor die assembly also includes a biodegradable structure attached to its second side opposite to the first side. The biodegradable structure includes a conductive material and an insulating material, both of which are biodegradable and disintegrate in a wet process. The biodegradable structure can be configured to couple the memory controller die with an interface die. In this manner, when the biodegradable structure disintegrates (e.g., dissolve) in the wet process, the memory controller carrying the memory dies can be separated from the interface die to reclaim the memory controller with the memory dies and the interface die.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Inventors: Fatma Arzum Simsek-Ege, Luoqi Li, Marsela Pontoh
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Patent number: 11817393Abstract: Semiconductor die assemblies with decomposable materials, and associated methods and systems are disclosed. In an embodiment, a semiconductor die assembly includes a memory controller die carrying one or more memory dies attached to its first side. The semiconductor die assembly also includes a biodegradable structure attached to its second side opposite to the first side. The biodegradable structure includes a conductive material and an insulating material, both of which are biodegradable and disintegrate in a wet process. The biodegradable structure can be configured to couple the memory controller die with an interface die. In this manner, when the biodegradable structure disintegrates (e.g., dissolve) in the wet process, the memory controller carrying the memory dies can be separated from the interface die to reclaim the memory controller with the memory dies and the interface die.Type: GrantFiled: September 1, 2021Date of Patent: November 14, 2023Assignee: Micron Technology, Inc.Inventors: Fatma Arzum Simsek-Ege, Luoqi Li, Marsela Pontoh
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Patent number: 11811874Abstract: Methods, systems, and devices associated with an edge device are described. An edge device can include a processing resource and a memory resource having instructions executable to receive, at the processing resource, the memory resource, or both, and from a first source comprising a device in communication with the edge device, first input associated with a user of the device. The instructions can be executable to receive, from a second source, second input associated with a user of the device, determine, based on the first input and the second input, operational instructions for the device and transmit the operational instructions to the device. The instructions can be executable to update, using a machine learning model, the operational instructions responsive to receiving an indication of performance of the operational instructions by the device and responsive to third input received from the first source, the second source, or both.Type: GrantFiled: April 13, 2022Date of Patent: November 7, 2023Assignee: Micron Technology, Inc.Inventors: Sharmila Velamur, Fatma Arzum Simsek-Ege, Shivani Srivastava, Marsela Pontoh, Lavanya Sriram
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Publication number: 20230069261Abstract: Semiconductor die assemblies with decomposable materials, and associated methods and systems are disclosed. In an embodiment, a semiconductor die assembly includes a memory controller die carrying one or more memory dies attached to its first side. The semiconductor die assembly also includes a biodegradable structure attached to its second side opposite to the first side. The biodegradable structure includes a conductive material and an insulating material, both of which are biodegradable and disintegrate in a wet process. The biodegradable structure can be configured to couple the memory controller die with an interface die. In this manner, when the biodegradable structure disintegrates (e.g., dissolve) in the wet process, the memory controller carrying the memory dies can be separated from the interface die to reclaim the memory controller with the memory dies and the interface die.Type: ApplicationFiled: September 1, 2021Publication date: March 2, 2023Inventors: Fatma Arzum Simsek-Ege, Luoqi Li, Marsela Pontoh
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Publication number: 20220329657Abstract: Methods, systems, and devices associated with an edge device are described. An edge device can include a processing resource and a memory resource having instructions executable to receive, at the processing resource, the memory resource, or both, and from a first source comprising a device in communication with the edge device, first input associated with a user of the device. The instructions can be executable to receive, from a second source, second input associated with a user of the device, determine, based on the first input and the second input, operational instructions for the device and transmit the operational instructions to the device. The instructions can be executable to update, using a machine learning model, the operational instructions responsive to receiving an indication of performance of the operational instructions by the device and responsive to third input received from the first source, the second source, or both.Type: ApplicationFiled: April 13, 2022Publication date: October 13, 2022Inventors: Sharmila Velamur, Fatma Arzum Simsek-Ege, Shivani Srivastava, Marsela Pontoh, Lavanya Sriram
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Patent number: 11323521Abstract: Methods, systems, and devices associated with an edge device are described. An edge device can include a processing resource and a memory resource having instructions executable to receive, at the processing resource, the memory resource, or both, and from a first source comprising a device in communication with the edge device, first input associated with a user of the device. The instructions can be executable to receive, from a second source, second input associated with a user of the device, determine, based on the first input and the second input, operational instructions for the device and transmit the operational instructions to the device. The instructions can be executable to update, using a machine learning model, the operational instructions responsive to receiving an indication of performance of the operational instructions by the device and responsive to third input received from the first source, the second source, or both.Type: GrantFiled: April 8, 2021Date of Patent: May 3, 2022Assignee: Micron Technology, Inc.Inventors: Sharmila Velamur, Fatma Arzum Simsek-Ege, Shivani Srivastava, Marsela Pontoh, Lavanya Sriram
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Patent number: 7683413Abstract: A method for forming a double sided container capacitor comprises forming a first capacitor top plate layer within a recess in a dielectric layer, then forming a first cell dielectric on the first top plate layer. Next, first and second bottom plate layers are formed on the first cell dielectric layer, and a second cell dielectric layer is formed on the second bottom plate layers. Finally, a second top plate layer is formed on the second cell dielectric layer, and the first and second top plate layers are electrically connected using a conductive plug or conductive spacer. An inventive structure formed using the inventive method is also described.Type: GrantFiled: September 7, 2006Date of Patent: March 23, 2010Assignee: Micron Technology, Inc.Inventors: Thomas M. Graettinger, Marsela Pontoh, Thomas A. Figura
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Patent number: 7449391Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.Type: GrantFiled: November 10, 2005Date of Patent: November 11, 2008Assignee: Micron Technology, Inc.Inventors: H. Montgomery Manning, Thomas M. Graettinger, Marsela Pontoh
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Patent number: 7420238Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.Type: GrantFiled: July 22, 2005Date of Patent: September 2, 2008Assignee: Micron Technology, Inc.Inventors: H. Montgomery Manning, Thomas M. Graettinger, Marsela Pontoh
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Patent number: 7414297Abstract: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.Type: GrantFiled: September 21, 2007Date of Patent: August 19, 2008Assignee: Micron Technology, Inc.Inventors: Marsela Pontoh, Cem Basceri, Thomas M. Graettinger
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Publication number: 20080012093Abstract: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.Type: ApplicationFiled: September 21, 2007Publication date: January 17, 2008Inventors: Marsela Pontoh, Cem Basceri, Thomas Graettinger
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Patent number: 7274061Abstract: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.Type: GrantFiled: May 6, 2004Date of Patent: September 25, 2007Assignee: Micron Technology, Inc.Inventors: Marsela Pontoh, Cem Basceri, Thomas M. Graettinger
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Patent number: 7274059Abstract: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.Type: GrantFiled: July 12, 2006Date of Patent: September 25, 2007Assignee: Micron Technology, Inc.Inventors: Marsela Pontoh, Cem Basceri, Thomas M. Graettinger
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Patent number: 7271051Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.Type: GrantFiled: November 10, 2005Date of Patent: September 18, 2007Assignee: Micron Technology, Inc.Inventors: H. Montgomery Manning, Thomas M. Graettinger, Marsela Pontoh
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Publication number: 20070001207Abstract: A method for forming a double sided container capacitor comprises forming a first capacitor top plate layer within a recess in a dielectric layer, then forming a first cell dielectric on the first top plate layer. Next, first and second bottom plate layers are formed on the first cell dielectric layer, and a second cell dielectric layer is formed on the second bottom plate layers. Finally, a second top plate layer is formed on the second cell dielectric layer, and the first and second top plate layers are electrically connected using a conductive plug or conductive spacer. An inventive structure formed using the inventive method is also described.Type: ApplicationFiled: September 7, 2006Publication date: January 4, 2007Inventors: Thomas Graettinger, Marsela Pontoh, Thomas Figura
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Publication number: 20060252201Abstract: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.Type: ApplicationFiled: July 12, 2006Publication date: November 9, 2006Inventors: Marsela Pontoh, Cem Basceri, Thomas Graettinger
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Patent number: 7125781Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.Type: GrantFiled: December 10, 2003Date of Patent: October 24, 2006Assignee: Micron Technology, Inc.Inventors: H. Montgomery Manning, Thomas M. Graettinger, Marsela Pontoh
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Patent number: 7105403Abstract: A method for forming a double sided container capacitor comprises forming a first capacitor top plate layer within a recess in a dielectric layer, then forming a first cell dielectric on the first top plate layer. Next, first and second bottom plate layers are formed on the first cell dielectric layer, and a second cell dielectric layer is formed on the second bottom plate layers. Finally, a second top plate layer is formed on the second cell dielectric layer, and the first and second top plate layers are electrically connected using a conductive plug or conductive spacer. An inventive structure formed using the inventive method is also described.Type: GrantFiled: July 28, 2003Date of Patent: September 12, 2006Assignee: Micron Technology, Inc.Inventors: Thomas M. Graettinger, Marsela Pontoh, Thomas A. Figura
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Publication number: 20060063344Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.Type: ApplicationFiled: November 10, 2005Publication date: March 23, 2006Inventors: H. Manning, Thomas Graettinger, Marsela Pontoh
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Publication number: 20060063345Abstract: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.Type: ApplicationFiled: November 10, 2005Publication date: March 23, 2006Inventors: H. Manning, Thomas Graettinger, Marsela Pontoh