Patents by Inventor Marsha Eng

Marsha Eng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7281140
    Abstract: A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline. The monitored activity is scaled according to the current operating point of the processor and a power state is determined from the scaled activity. If the power state reaches a first threshold, the operating point of the processor is adjusted and a new scaling factor is selected to determine the power state.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: October 9, 2007
    Assignee: Intel Corporation
    Inventors: James S. Burns, Stefan Rusu, David J. Ayers, Edward T. Grochowski, Marsha Eng, Vivek Tiwari
  • Patent number: 7260705
    Abstract: In one embodiment, the invention provides a method for examining information about branch instructions. A method, comprising: examining information about branch instructions that reach a write-back stage of processing within a processor, defining a plurality of streams based on the examining, wherein each stream comprises a sequence of basic blocks in which only a last block in the sequence ends in a branch instruction, the execution of which causes program flow to branch, the remaining basic blocks in the stream each ending in a branch instruction, the execution of which does not cause program flow to branch.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: August 21, 2007
    Assignee: Intel Corporation
    Inventors: Hong Wang, John Shen, Perry Wang, Marsha Eng, Gerolf F. Hoflehner, Dan Lavery, Wei Li, Alejandro Ramirez, Ed Grochowski
  • Patent number: 7228528
    Abstract: In one embodiment, the invention provides a method for the processing of instructions. A method which comprises analyzing a dynamic execution trace for a program; identifying at least one stream comprising a plurality of basic blocks in the dynamic execution trace; collecting metrics associated with the at least one stream; and optimizing the at least one stream based on the metrics.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: June 5, 2007
    Assignee: Intel Corporation
    Inventors: Hong Wang, Marsha Eng, Perry Wang, John P. Shen, Gerolf F. Hoflehner, Daniel Lavery, Wei Li
  • Patent number: 6931559
    Abstract: A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: August 16, 2005
    Assignee: Intel Corporation
    Inventors: James S. Burns, Stefan Rusu, David J. Ayers, Edward T. Grochowski, Marsha Eng, Vivek Tiwari
  • Publication number: 20040268333
    Abstract: In one embodiment, the invention provides a method for the processing of instructions. A method which comprises analyzing a dynamic execution trace for a program; identifying at least one stream comprising a plurality of basic blocks in the dynamic execution trace; collecting metrics associated with the at least one stream; and optimizing the at least one stream based on the metrics.
    Type: Application
    Filed: June 26, 2003
    Publication date: December 30, 2004
    Inventors: Hong Wang, Marsha Eng, Perry Wang, John P. Shen, Gerolf F. Hoflehner, Daniel Lavery, Wei Li
  • Publication number: 20040268100
    Abstract: In one embodiment, the invention provides a method for examining information about branch instructions. A method, comprising: examining information about branch instructions that reach a write-back stage of processing within a processor, defining a plurality of streams based on the examining, wherein each stream comprises a sequence of basic blocks in which only a last block in the sequence ends in a branch instruction, the execution of which causes program flow to branch, the remaining basic blocks in the stream each ending in a branch instruction, the execution of which does not cause program flow to branch.
    Type: Application
    Filed: June 26, 2003
    Publication date: December 30, 2004
    Inventors: Hong Wang, John Shen, Perry Wang, Marsha Eng, Gerolf F. Hoflehner, Dan Lavery, Wei Li, Alejandro Ramirez, Ed Grochowski
  • Publication number: 20030126479
    Abstract: A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline. The monitored activity is scaled according to the current operating point of the processor and a power state is determined from the scaled activity. If the power state reaches a first threshold, the operating point of the processor is adjusted and a new scaling factor is selected to determine the power state.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 3, 2003
    Inventors: James S. Burns, Stefan Rusu, David J. Ayers, Edward T. Grochowski, Marsha Eng, Vivek Tiwari
  • Publication number: 20030126478
    Abstract: A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 3, 2003
    Inventors: James S. Burns, Stefan Rusu, David J. Ayers, Edward T. Grochowski, Marsha Eng, Vivek Tiwari