Patents by Inventor Marshall D. Wilson

Marshall D. Wilson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12154833
    Abstract: Methods of characterizing semiconductor doping in a wide bandgap semiconductor sample include: measuring an initial value, V0, of a surface voltage at a region of a surface of the semiconductor sample in the dark; charging the region to deep depletion in the dark by depositing a prescribed corona charge at the region; measuring the surface voltage value in the dark at the region after charging; illuminating the charged region with light of a specific photon flux, feff, having a photon energy above the semiconductor bandgap sufficient to generate free minority carriers in the semiconductor sample causing photoneutralization of the corona charge; monitoring of a photoneutralization induced corona charge decay at the region vs.
    Type: Grant
    Filed: June 21, 2024
    Date of Patent: November 26, 2024
    Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.
    Inventors: Marshall D. Wilson, Jacek Lagowski, Carlos Almeida, Bret Schrayer, Alexandre Savtchouk
  • Publication number: 20240347399
    Abstract: Methods of characterizing semiconductor doping in a wide bandgap semiconductor sample include: measuring an initial value, V0, of a surface voltage at a region of a surface of the semiconductor sample in the dark; charging the region to deep depletion in the dark by depositing a prescribed corona charge at the region; measuring the surface voltage value in the dark at the region after charging; illuminating the charged region with light of a specific photon flux, ƒeff, having a photon energy above the semiconductor bandgap sufficient to generate free minority carriers in the semiconductor sample causing photoneutralization of the corona charge; monitoring of a photoneutralization induced corona charge decay at the region vs.
    Type: Application
    Filed: June 21, 2024
    Publication date: October 17, 2024
    Inventors: Marshall D. Wilson, Jacek Lagowski, Carlos Almeida, Bret Schrayer, Alexandre Savtchouk
  • Patent number: 12027430
    Abstract: Methods of characterizing semiconductor doping in a wide bandgap semiconductor sample include: measuring an initial value, V0, of a surface voltage at a region of a surface of the semiconductor sample in the dark; charging the region to deep depletion in the dark by depositing a prescribed corona charge at the region; measuring the surface voltage value in the dark at the region after charging; illuminating the charged region with light of a specific photon flux, ƒeff, having a photon energy above the semiconductor bandgap sufficient to generate free minority carriers in the semiconductor sample causing photoneutralization of the corona charge; monitoring of a photoneutralization induced corona charge decay at the region vs.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: July 2, 2024
    Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.
    Inventors: Marshall D. Wilson, Jacek Lagowski, Carlos Almeida, Bret Schrayer, Alexandre Savtchouk
  • Patent number: 9685906
    Abstract: Methods for fast and accurate mapping of passivation defects in a silicon wafer involve capturing of photoluminescence (PL) images while the wafer is moving, for instance, when the wafer is transported on a belt in a fabrication line. The methods can be applied to in-line diagnostics of silicon wafers in solar cell fabrication. Example embodiments include a procedure for obtaining the whole wafer images of passivation defects from a single image (map) of photoluminescence intensity, and can provide rapid feedback for process control.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: June 20, 2017
    Assignee: Semilab SDI LLC
    Inventors: Jacek Lagowski, Marshall D. Wilson, Ferenc Korsos, György Nádudvari
  • Publication number: 20150008952
    Abstract: Methods for fast and accurate mapping of passivation defects in a silicon wafer involve capturing of photoluminescence (PL) images while the wafer is moving, for instance, when the wafer is transported on a belt in a fabrication line. The methods can be applied to in-line diagnostics of silicon wafers in solar cell fabrication. Example embodiments include a procedure for obtaining the whole wafer images of passivation defects from a single image (map) of photoluminescence intensity, and can provide rapid feedback for process control.
    Type: Application
    Filed: June 26, 2014
    Publication date: January 8, 2015
    Inventors: Jacek Lagowski, Marshall D. Wilson, Ferenc Korsos, György Nádudvari
  • Patent number: 8912799
    Abstract: A method is described for accurate measuring of the excess carrier lifetime on a semiconductor sample from the carrier decay after termination of the excitation pulse imposed on the steady-state carrier excitation. The method includes determining a quality of decay parameter using progressing segments in each carrier decay; establishing an accurate lifetime measurement multiparameter domain for experimental variables whereby the quality of decay parameter falls within prescribed limits from the ideal exponential decay value of QD=1; and determining an excess carrier lifetime for the semiconductor sample based on experimental measurement conditions within the domain and the quality of decay value within the predetermined range indicative of an accurate excess carrier lifetime measurement.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: December 16, 2014
    Assignee: Semiconductor Physics Laboratory Co., Ltd.
    Inventors: Jacek Lagowski, Marshall D. Wilson
  • Patent number: 8093920
    Abstract: Surface photo-voltage measurements are used to accurately determine very long steady state diffusion length of minority carriers and to determine iron contaminant concentrations and other recombination centers in very pure wafers. Disclosed methods use multiple (e.g., at least two) non-steady state surface photovoltage measurements of diffusion length done at multiple (e.g., at least two) modulation frequencies. The measured diffusion lengths are then used to obtain a steady state diffusion length with an algorithm extrapolating diffusion length to zero frequency. The iron contaminant concentration is obtained from near steady state measurement of diffusion length at elevated frequency before and after iron activation. The concentration of other recombination centers can then be determined from the steady state diffusion length and the iron concentration measured at elevated frequency.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: January 10, 2012
    Assignee: Semiconductor Diagnostics, Inc.
    Inventors: Jacek Lagowski, Alexandre Savtchouk, Marshall D. Wilson
  • Publication number: 20100085073
    Abstract: Surface photo-voltage measurements are used to accurately determine very long steady state diffusion length of minority carriers and to determine iron contaminant concentrations and other recombination centers in very pure wafers. Disclosed methods use multiple (e.g., at least two) non-steady state surface photovoltage measurements of diffusion length done at multiple (e.g., at least two) modulation frequencies. The measured diffusion lengths are then used to obtain a steady state diffusion length with an algorithm extrapolating diffusion length to zero frequency. The iron contaminant concentration is obtained from near steady state measurement of diffusion length at elevated frequency before and after iron activation. The concentration of other recombination centers can then be determined from the steady state diffusion length and the iron concentration measured at elevated frequency.
    Type: Application
    Filed: August 21, 2009
    Publication date: April 8, 2010
    Inventors: Jacek Lagowski, Alexandre Savtchouk, Marshall D. Wilson
  • Patent number: 6815974
    Abstract: Techniques for determining the composition of mixed dielectric layers are disclosed.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: November 9, 2004
    Assignee: Semiconductor Diagnostics, Inc.
    Inventors: Jacek Lagowski, Marshall D. Wilson, John D'Amico, Alexandre Savtchouk, Lubomir L. Jastrzebski
  • Patent number: 6680621
    Abstract: A method is described for measuring the capacitance and the equivalent oxide thickness of an ultra thin dielectric layer on a silicon substrate in which the dielectric layer is uniform or patterned. The surface of a dielectric layer is electrically charged by a flux on ions from a corona discharge source until a steady state is reached when the corona flux is balanced by the leakage current across a dielectric. The flux is abruptly terminated and the surface potential of a dielectric is measured versus time. The steady state value of the surface potential is obtained by extrapolation of the potential decay curve to the initial moment of ceasing the corona flux. The thickness of a dielectric layer is determined by using the steady state potential or by using the value of the surface potential after a predetermined time.
    Type: Grant
    Filed: May 8, 2001
    Date of Patent: January 20, 2004
    Assignee: Semiconductor Diagnostics, Inc.
    Inventors: Alexander Savtchouk, Jacek Lagowski, John D'amico, Marshall D. Wilson, Lubomir L. Jastrzebski
  • Patent number: 6597193
    Abstract: A method is described for non-contact measuring the capacitance and the equivalent oxide thickness of ultra thin dielectric layer on a silicon substrate. The surface of a dielectric layer is electrically charged by a flux on ions from a corona discharge source until a steady state is reached when the corona flux is balanced by the leakage current across a dielectric. The flux is abruptly terminated and the surface potential of a dielectric is measured versus time. The steady state value of the surface potential is obtained by extrapolation of the potential decay curve to the initial moment of ceasing the corona flux. The thickness of a dielectric layer is determined by using the steady state potential or by using the value of the surface potential after a predetermined time. The method produces highly accurate results for oxide thickness below 40 Å with a demonstrated repeatability of a 0.03 Å in a series of 10 measurements.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: July 22, 2003
    Assignee: Semiconductor Diagnostics, Inc.
    Inventors: Jacek Lagowski, Alexander Savtchouk, Marshall D. Wilson
  • Patent number: 6569691
    Abstract: A method and apparatus for measuring the concentration of different mobile ions in the oxide layer of a semiconductor wafer from the contact potential shift caused by different ions drifting across the oxide that includes depositing charge (e.g., using a corona discharge device) on the surface of the oxide and heating the wafer to allow different mobile ions in the oxide to drift. The difference in the contact potential measured before and after heating provides an indication of the different mobile ion concentration in the oxide layer.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: May 27, 2003
    Assignee: Semiconductor Diagnostics, Inc.
    Inventors: Lubomir L. Jastrzebski, Alexander Savtchouk, Marshall D. Wilson
  • Publication number: 20020130674
    Abstract: A method is described for non-contact measuring the capacitance and the equivalent oxide thickness of ultra thin dielectric layer on a silicon substrate. The surface of a dielectric layer is electrically charged by a flux on ions from a corona discharge source until a steady state is reached when the corona flux is balanced by the leakage current across a dielectric. The flux is abruptly terminated and the surface potential of a dielectric is measured versus time. The steady state value of the surface potential is obtained by extrapolation of the potential decay curve to the initial moment of ceasing the corona flux. The thickness of a dielectric layer is determined by using the steady state potential or by using the value of the surface potential after a predetermined time. The method produces highly accurate results for oxide thickness below 40 Å with a demonstrated repeatability of a 0.03 Å in a series of 10 measurements.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 19, 2002
    Inventors: Jacek Lagowski, Alexander Savtchouk, Marshall D. Wilson
  • Publication number: 20020125900
    Abstract: A method is described for measuring the capacitance and the equivalent oxide thickness of an ultra thin dielectric layer on a silicon substrate in which the dielectric layer is uniform or patterned. The surface of a dielectric layer is electrically charged by a flux on ions from a corona discharge source until a steady state is reached when the corona flux is balanced by the leakage current across a dielectric. The flux is abruptly terminated and the surface potential of a dielectric is measured versus time. The steady state value of the surface potential is obtained by extrapolation of the potential decay curve to the initial moment of ceasing the corona flux. The thickness of a dielectric layer is determined by using the steady state potential or by using the value of the surface potential after a predetermined time.
    Type: Application
    Filed: May 8, 2001
    Publication date: September 12, 2002
    Inventors: Alexander Savtchouk, Jacek Lagowski, John D'amico, Marshall D. Wilson, Lubomir L. Jastrzebski
  • Patent number: 6037797
    Abstract: A method of determining charge associated with traps present in a semiconductor oxide interface is described. The method includes the steps of depositing a dose of charge over a surface of the oxide and measuring a resultant value of surface potential barrier at the portion of the surface. From the measured value of surface charge and deposited charge dose a value of charge associated with the interface trap is determined. The method also includes determining space charge corresponding to the measured surface potential barrier of the portion of the substrate. With the determined space charge and known deposited charge the interface trapped charge is determined by noting that the change in interface trapped charge is related to the negative of the changes in space charge and deposited charge.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: March 14, 2000
    Assignee: Semiconductor Diagnostics, Inc.
    Inventors: Jacek Lagowski, Piotr Edelman, Marshall D. Wilson