Patents by Inventor Martha A. Johnson

Martha A. Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240076697
    Abstract: The present disclosure provides compositions of matter, methods, systems, and instruments for improved nucleic acid-guided nuclease editing in live cells, wherein the live cells are shifted into a growth-arrested state for editing.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 7, 2024
    Applicant: Inscripta, Inc.
    Inventors: Karl GERHARDT, Charles JOHNSON, Martha BRAUN
  • Publication number: 20230384060
    Abstract: A soft body armor arrangement has a plurality of layers of soft ballistic material stacked on one another, each layer comprising a plurality of sub-layers of ballistic material. Each of the layers has a respective seam line attaching two or more respective sections of the layer. The sizes of the section are varied so that the resultant seam lines of adjacent layers are offset and spaced apart from one another, but the overall size and shape of each layer is the same. This avoids stacking and bunching of the seam lines which can cause rigidity and discomfort.
    Type: Application
    Filed: May 24, 2023
    Publication date: November 30, 2023
    Inventors: Martha Johnson, Randall Jered LeMarbe
  • Patent number: 8330556
    Abstract: An acoustic resonator, comprises a substrate and a first passivation layer disposed over the substrate. The first passivation layer comprises a first layer of silicon carbide (SiC). The acoustic resonator further comprises a first electrode disposed over the passivation layer, a second electrode, and a piezoelectric layer disposed between the first and second electrodes. The acoustic resonator comprises a second passivation layer disposed over the second electrode. The second passivation layer comprises a second layer of silicon carbide (SiC).
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: December 11, 2012
    Assignee: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
    Inventors: Daniel J. Miller, Martha Johnson
  • Patent number: 8271232
    Abstract: A method for detecting and reporting changes in functional features of a simulation model caused by a software revision is disclosed. In one aspect, the method is independent of simulation model architecture. One performs regression testing with a plurality of feature-specific modules. The feature-specific modules are configured to generate a first set of information with the simulation model and compare the first set of information to a second set of corresponding information from the simulation model. In the above-described testing, the first set of information postdates the software revision and the second set of information predates the software revision.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: September 18, 2012
    Assignees: Cadence Design Systems, Inc., Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: James M. Roucis, Robert Chizmadia, Douglas L. Anneser, Martin C. Shipley, Thomas E. Mitchell, Martha Johnson, Andrew M. Weilert
  • Publication number: 20120091778
    Abstract: An apparatus is for maintaining the head of a person in an erect position when the person is sitting in a seat. The apparatus includes a clamp connected to the seat. A flexible rod is provided. A mechanism is for coupling an end of the flexible rod to the clamp. The flexible rod can be bent to extend across the forehead of the head of the person, to keep the head in the erect position especially when the person is sleeping.
    Type: Application
    Filed: October 19, 2011
    Publication date: April 19, 2012
    Inventors: MARTHA JOHNSON, Shannon Baker, Apryl Blackburn
  • Publication number: 20110121915
    Abstract: An acoustic resonator, comprises a substrate and a first passivation layer disposed over the substrate. The first passivation layer comprises a first layer of silicon carbide (SiC). The acoustic resonator further comprises a first electrode disposed over the passivation layer, a second electrode, and a piezoelectric layer disposed between the first and second electrodes. The acoustic resonator comprises a second passivation layer disposed over the second electrode. The second passivation layer comprises a second layer of silicon carbide (SiC).
    Type: Application
    Filed: November 23, 2009
    Publication date: May 26, 2011
    Applicant: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
    Inventors: Daniel J. Miller, Martha Johnson
  • Patent number: 7801699
    Abstract: A method for detecting and reporting changes in functional features of a simulation model caused by a software revision is disclosed. In one aspect, the method is independent of simulation model architecture. One performs regression testing with a plurality of feature-specific modules. The feature-specific modules are configured to generate a first set of information with the simulation model and compare the first set of information to a second set of corresponding information from the simulation model. In the above-described testing, the first set of information postdates the software revision and the second set of information predates the software revision.
    Type: Grant
    Filed: April 10, 2006
    Date of Patent: September 21, 2010
    Assignees: Cadence Design Systems, Inc., Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: James M. Roucis, Robert Chizmadia, Douglas L. Anneser, Martin C. Shipley, Thomas E. Mitchell, Martha Johnson, Andrew M. Weilert
  • Patent number: 7534636
    Abstract: A method for forming a lid for a wafer-scale package includes (1) forming a cavity in a substrate, (2) forming an oxide layer over the cavity and over a bond area around the cavity on the substrate, (3) forming a reflective layer over the oxide layer, (4) forming a barrier layer over the reflective layer, (5) etching a portion of the barrier layer down to a portion of the reflective layer over the bond area, and (6) forming a solder layer on the portion of the reflective layer. The reflective layer can be a titanium-platinum-gold metal stack and the barrier layer can be a titanium dioxide layer.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: May 19, 2009
    Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventors: Kendra J. Gallup, James A. Matthews, Martha Johnson
  • Patent number: 7422929
    Abstract: In an embodiment, the invention provides a method for forming a wafer-level package. A bonding pad is formed on a first wafer. After forming the bonding pad, an optoelectronic device is located on the first wafer. A gasket is formed on a second wafer. After a gasket is formed on a second wafer, the second wafer is attached to the first wafer with a bond between the gasket and the bonding pad.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: September 9, 2008
    Assignee: Avago Technologies Fiber IP Pte Ltd
    Inventors: Kendra J. Gallup, Frank S. Geefay, Ronald Shane Fazzio, Martha Johnson, Carrie Ann Guthrie, Tanya Jegeris Snyder, Richard C. Ruby
  • Publication number: 20060121635
    Abstract: A method for forming a lid for a wafer-scale package includes (1) forming a cavity in a substrate, (2) forming an oxide layer over the cavity and over a bond area around the cavity on the substrate, (3) forming a reflective layer over the oxide layer, (4) forming a barrier layer over the reflective layer, (5) etching a portion of the barrier layer down to a portion of the reflective layer over the bond area, and (6) forming a solder layer on the portion of the reflective layer. The reflective layer can be a titanium-platinum-gold metal stack and the barrier layer can be a titanium dioxide layer.
    Type: Application
    Filed: January 18, 2006
    Publication date: June 8, 2006
    Inventors: Kendra Gallup, James Matthews, Martha Johnson
  • Patent number: 7045827
    Abstract: A lid for a wafer-scale package includes a body having a bond area around a cavity defined by the body, an oxide layer atop the bond area and the cavity, and a reflective layer atop the oxide layer. The cavity has an angled sidewall where a portion of the reflective layer over the angled sidewall forms a mirror for reflecting a light. The lid further includes a solder layer atop another portion of the reflective layer over the bond area, and a barrier layer atop the mirror. The barrier layer is solder non-wettable so it prevents the solder layer from wicking into the cavity and interfering with the mirror. The barrier layer is also transparent to the light and has a thickness that either does not affect the light reflection or improves the light reflection.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: May 16, 2006
    Inventors: Kendra J. Gallup, James A. Matthews, Martha Johnson
  • Publication number: 20050285242
    Abstract: A method for forming a lid for a wafer-scale package includes (1) forming a cavity in a substrate, (2) forming an oxide layer over the cavity and over a bond area around the cavity on the substrate, (3) forming a reflective layer over the oxide layer, (4) forming a barrier layer over the reflective layer, (5) etching a portion of the barrier layer down to a portion of the reflective layer over the bond area, and (6) forming a solder layer on the portion of the reflective layer. The reflective layer can be a titanium-platinum-gold metal stack and the barrier layer can be a titanium dioxide layer.
    Type: Application
    Filed: June 24, 2004
    Publication date: December 29, 2005
    Inventors: Kendra Gallup, James Matthews, Martha Johnson
  • Publication number: 20050285131
    Abstract: A method for forming a lid for a wafer-scale package includes (1) forming a cavity in a substrate, (2) forming an oxide layer over the cavity and over a bond area around the cavity on the substrate, (3) forming a reflective layer over the oxide layer, (4) forming a barrier layer over the reflective layer, (5) etching a portion of the barrier layer down to a portion of the reflective layer over the bond area, and (6) forming a solder layer on the portion of the reflective layer. The reflective layer can be a titanium-platinum-gold metal stack and the barrier layer can be a titanium dioxide layer.
    Type: Application
    Filed: March 31, 2005
    Publication date: December 29, 2005
    Inventors: Kendra Gallup, James Matthews, Martha Johnson
  • Patent number: 6953990
    Abstract: A wafer-level package includes a first wafer comprising a bonding pad, an optoelectronic device on the first wafer, and a second wafer comprising a gasket. The second wafer is attached to the first wafer by a bond between the gasket and the bonding pad.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: October 11, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Kendra J. Gallup, Frank S. Geefay, Ronald Shane Fazzio, Martha Johnson, Carrie Ann Guthrie, Tanya Jegeris Snyder, Richard C. Ruby
  • Publication number: 20050142692
    Abstract: A wafer-level package includes a first wafer comprising a bonding pad, an optoelectronic device on the first wafer, and a second wafer comprising a gasket. The second wafer is attached to the first wafer by a bond between the gasket and the bonding pad.
    Type: Application
    Filed: March 2, 2005
    Publication date: June 30, 2005
    Inventors: Kendra Gallup, Frank Geefay, Ronald Fazzio, Martha Johnson, Carrie Guthrie, Tanya Snyder, Richard Ruby
  • Publication number: 20050062122
    Abstract: A wafer-level package includes a first wafer comprising a bonding pad, an optoelectronic device on the first wafer, and a second wafer comprising a gasket. The second wafer is attached to the first wafer by a bond between the gasket and the bonding pad.
    Type: Application
    Filed: September 19, 2003
    Publication date: March 24, 2005
    Inventors: Kendra Gallup, Frank Geefay, Ronald Fazzio, Martha Johnson, Carrie Guthrie, Tanya Snyder, Richard Ruby
  • Publication number: 20030179011
    Abstract: An integrated polysilicon fuse and diode and methods of making the same are provided. The integrated polysilicon fuse and diode combination may be implemented in a programmable cross point fuse array. The integrated polysilicon fuse and diode may be used in a random access memory (RAM) cell. The polysilicon diode may be isolated from a substrate and other devices, use less area on a substrate, and cost less to manufacture compared to other diodes.
    Type: Application
    Filed: March 20, 2002
    Publication date: September 25, 2003
    Inventors: Jon Goodbread, John Stanback, Chris Feng, Martha Johnson
  • Patent number: 6386971
    Abstract: An air freshener holding device for evenly dispensing a fragrance throughout an entire room each time a fan unit is turned on. The air freshener holding device includes a container having a front wall, a back wall, a bottom wall, side walls, an open top, and a storage compartment being disposed therein and being adapted to removably retain cakes of deodorant; and also includes fastening members being attached to the container and being adapted to attach the container to a fan vent cover.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: May 14, 2002
    Inventor: Martha A. Johnson