Patents by Inventor Martha Voytovich

Martha Voytovich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060140188
    Abstract: Methods and apparatus that allow recovery in the event that sequence counts used on receive and transmit sides of a communications link become out of sync are provided. In response to receiving a packet with an expected sequence count from a receiving device, a transmitting device may adjust pointers into a transmit buffer allowing the transmitting device to begin transmitting packets with the sequence count expected by the receiving device.
    Type: Application
    Filed: December 28, 2004
    Publication date: June 29, 2006
    Applicant: International Business Machines Corporation
    Inventors: Robert Shearer, Martha Voytovich, Craig Wigglesworth
  • Publication number: 20060140122
    Abstract: Methods and apparatus that allow lost packets on one virtual channel to be retried without requiring all subsequently issued packets, sent over other virtual channels, to be retried. In other words, packet retries may be performed on a “per virtual channel” basis. As a result, other virtual channels, not experiencing lost packets, may not suffer reductions in their bandwidth due to a lost packet occurring on another virtual channel.
    Type: Application
    Filed: December 28, 2004
    Publication date: June 29, 2006
    Applicant: International Business Machines Corporation
    Inventors: Robert Shearer, Martha Voytovich
  • Publication number: 20050160226
    Abstract: A computer system includes multiple caches and a cache line state directory structure, having at least a portion dedicated to a particular device cache within a particular device, and contains a fixed number of entries having a one-to-one correspondence to the cache lines of the cache to which it corresponds. The cache line state directory is used to determine whether it is necessary to send an invalidation message to the device cache. In the preferred embodiment, a dedicated portion of the cache line state directory structure corresponds to an I/O bridge device cache. Preferably, the cache line state directory also maintains state for one or more processor caches in a different format. The computer system preferably uses a NUMA architecture, the directories being maintained by node servers in each node.
    Type: Application
    Filed: January 20, 2004
    Publication date: July 21, 2005
    Applicant: International Business Machines Corporation
    Inventors: Duane Averill, Russell Hoover, David Shedivy, Martha Voytovich