Patents by Inventor Martijn Fridus Snoeij
Martijn Fridus Snoeij has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11616504Abstract: An amplifier overload power limit circuit, system, and a method thereof comprising a monitoring of a current gain of a BJT based on a current detector and limiting power to the BJT based on the monitored current gain to prevent the BJT from driven into a saturation mode and the amplifier overdrive.Type: GrantFiled: April 7, 2022Date of Patent: March 28, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sudarshan Udayashankar, Martijn Fridus Snoeij
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Patent number: 11502655Abstract: A logarithmic amplifier circuit includes an adaptive gain amplifier circuit and a transistor. The adaptive gain amplifier circuit includes a gain stage and a diode. The gain stage includes an input terminal, and an output terminal. The diode includes a cathode terminal coupled to the output terminal, and an anode terminal coupled to a common terminal. The transistor includes a first terminal coupled to the input terminal, a second terminal coupled to the common terminal, and a third terminal coupled to the output terminal.Type: GrantFiled: July 24, 2020Date of Patent: November 15, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Martijn Fridus Snoeij, Marco Corsi
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Patent number: 11469727Abstract: An electrical system includes a power supply and an electrical circuit coupled to the power supply and including an operational amplifier. The operational amplifier includes an input stage and a pre-driver stage coupled to the input stage, wherein the pre-driver stage includes a first input terminal, a second input terminal, and a voltage supply terminal. The operational amplifier also includes an output stage with bipolar transistors coupled to the pre-driver stage. The pre-driver stage is configured to: detect a voltage differential across the first and second input terminals of the pre-driver stage; and provide an adjustable bias current based on the voltage differential.Type: GrantFiled: June 30, 2020Date of Patent: October 11, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Martijn Fridus Snoeij
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Publication number: 20220231680Abstract: An amplifier overload power limit circuit, system, and a method thereof comprising a monitoring of a current gain of a BJT based on a current detector and limiting power to the BJT based on the monitored current gain to prevent the BJT from driven into a saturation mode and the amplifier overdrive.Type: ApplicationFiled: April 7, 2022Publication date: July 21, 2022Inventors: Sudarshan UDAYASHANKAR, Martijn Fridus SNOEIJ
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Patent number: 11309882Abstract: An amplifier overload power limit circuit, system, and a method thereof comprising a monitoring of a current gain of a BJT based on a current detector and limiting power to the BJT based on the monitored current gain to prevent the BJT from driven into a saturation mode and the amplifier overdrive.Type: GrantFiled: December 20, 2019Date of Patent: April 19, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sudarshan Udayashankar, Martijn Fridus Snoeij
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Publication number: 20210273619Abstract: An electrical system includes a power supply and an electrical circuit coupled to the power supply and including an operational amplifier. The operational amplifier includes an input stage and a pre-driver stage coupled to the input stage, wherein the pre-driver stage includes a first input terminal, a second input terminal, and a voltage supply terminal. The operational amplifier also includes an output stage with bipolar transistors coupled to the pre-driver stage. The pre-driver stage is configured to: detect a voltage differential across the first and second input terminals of the pre-driver stage; and provide an adjustable bias current based on the voltage differential.Type: ApplicationFiled: June 30, 2020Publication date: September 2, 2021Inventor: Martijn Fridus Snoeij
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Publication number: 20210194477Abstract: An amplifier overload power limit circuit, system, and a method thereof comprising a monitoring of a current gain of a BJT based on a current detector and limiting power to the BJT based on the monitored current gain to prevent the BJT from driven into a saturation mode and the amplifier overdrive.Type: ApplicationFiled: December 20, 2019Publication date: June 24, 2021Inventors: Sudarshan UDAYASHANKAR, Martijn Fridus SNOEIJ
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Patent number: 11005489Abstract: In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.Type: GrantFiled: January 13, 2020Date of Patent: May 11, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Martijn Fridus Snoeij, Mikhail Valeryevich Ivanov, Roberto Giampiero Massolini, Brian David Johnson
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Patent number: 10983180Abstract: An integrated fluxgate magnetic gradient sensor includes a common mode sensitive fluxgate magnetometer and a differential mode sensitive fluxgate magnetometer. The common mode sensitive fluxgate magnetometer includes a first core adjacent to a second core. The first and second cores are wrapped by a first excitation wire coil configured to receive an excitation current that affects a differential mode magnetic field. The differential mode sensitive fluxgate magnetometer includes a third core adjacent to the first core and a fourth core adjacent to the second core. The third and fourth cores are wrapped by a second excitation wire coil configured to receive an excitation current that affects a common mode magnetic field.Type: GrantFiled: September 13, 2019Date of Patent: April 20, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Martijn Fridus Snoeij, Viola Schaffer, Gebhard Haug
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Publication number: 20210067112Abstract: A logarithmic amplifier circuit includes an adaptive gain amplifier circuit and a transistor. The adaptive gain amplifier circuit includes a gain stage and a diode. The gain stage includes an input terminal, and an output terminal. The diode includes a cathode terminal coupled to the output terminal, and an anode terminal coupled to a common terminal. The transistor includes a first terminal coupled to the input terminal, a second terminal coupled to the common terminal, and a third terminal coupled to the output terminal.Type: ApplicationFiled: July 24, 2020Publication date: March 4, 2021Inventors: Martijn Fridus SNOEIJ, Marco CORSI
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Publication number: 20200153449Abstract: In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.Type: ApplicationFiled: January 13, 2020Publication date: May 14, 2020Inventors: Martijn Fridus SNOEIJ, Mikhail Valeryevich IVANOV, Roberto Giampiero MASSOLINI, Brian David JOHNSON
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Patent number: 10574252Abstract: In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.Type: GrantFiled: December 27, 2018Date of Patent: February 25, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Martijn Fridus Snoeij, Mikhail Valeryevich Ivanov, Roberto Giampiero Massolini, Brian David Johnson
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Publication number: 20200003848Abstract: An integrated fluxgate magnetic gradient sensor includes a common mode sensitive fluxgate magnetometer and a differential mode sensitive fluxgate magnetometer. The common mode sensitive fluxgate magnetometer includes a first core adjacent to a second core. The first and second cores are wrapped by a first excitation wire coil configured to receive an excitation current that affects a differential mode magnetic field. The differential mode sensitive fluxgate magnetometer includes a third core adjacent to the first core and a fourth core adjacent to the second core. The third and fourth cores are wrapped by a second excitation wire coil configured to receive an excitation current that affects a common mode magnetic field.Type: ApplicationFiled: September 13, 2019Publication date: January 2, 2020Inventors: Martijn Fridus Snoeij, Viola Schaffer, Gebhard Haug
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Patent number: 10459040Abstract: An integrated fluxgate magnetic gradient sensor includes a common mode sensitive fluxgate magnetometer and a differential mode sensitive fluxgate magnetometer. The common mode sensitive fluxgate magnetometer includes a first core adjacent to a second core. The first and second cores are wrapped by a first excitation wire coil configured to receive an excitation current that affects a differential mode magnetic field. The differential mode sensitive fluxgate magnetometer includes a third core adjacent to the first core and a fourth core adjacent to the second core. The third and fourth cores are wrapped by a second excitation wire coil configured to receive an excitation current that affects a common mode magnetic field.Type: GrantFiled: May 24, 2016Date of Patent: October 29, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Martijn Fridus Snoeij, Viola Schäffer, Gebhard Haug
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Patent number: 10439570Abstract: An operational amplifier includes an input stage configured to receive a first input voltage and a second input voltage and a slew boost circuit coupled to the input stage and configured to selectively increase current through the input stage. The operational amplifier also includes an output stage coupled to the input stage and configured to generate an output voltage, and a slew boost disable circuit configured to assert a control signal to the slew boost circuit to disable the slew boost circuit. The slew boost circuit is disabled when both: the first input voltage being more than a first threshold voltage different from the second input voltage and the output voltage failing to change by more than a second threshold rate.Type: GrantFiled: December 20, 2017Date of Patent: October 8, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Martijn Fridus Snoeij, Steven Graham Brantley
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Patent number: 10333478Abstract: An input stage of an operational amplifier receives first and second input voltages. An output slew detection circuit decreases a first current responsive to slewing of an output of the operational amplifier and increases the first current responsive to no slewing. A slew boost and differential input voltage detection generates a second current at a first level when the first and second input voltages are approximately equal and to generate the second current at a second level, smaller than the first level, responsive to the first and second input voltages not being approximately equal. A voltage on a capacitor increases responsive to the first current from the output slew detection circuit increasing and responsive to the second current being at the second level. A current mirror is activated responsive to the voltage on the capacitor exceeding a second threshold. The current mirror decreases a third current of the input stage.Type: GrantFiled: December 20, 2017Date of Patent: June 25, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Martijn Fridus Snoeij, Sudarshan Udayashankar
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Publication number: 20190190471Abstract: An operational amplifier includes an input stage configured to receive a first input voltage and a second input voltage and a slew boost circuit coupled to the input stage and configured to selectively increase current through the input stage. The operational amplifier also includes an output stage coupled to the input stage and configured to generate an output voltage, and a slew boost disable circuit configured to assert a control signal to the slew boost circuit to disable the slew boost circuit. The slew boost circuit is disabled when both: the first input voltage being more than a first threshold voltage different from the second input voltage and the output voltage failing to change by more than a second threshold rate.Type: ApplicationFiled: December 20, 2017Publication date: June 20, 2019Inventors: Martijn Fridus SNOEIJ, Steven Graham BRANTLEY
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Publication number: 20190190472Abstract: An input stage of an operational amplifier receives first and second input voltages. An output slew detection circuit decreases a first current responsive to slewing of an output of the operational amplifier and increases the first current responsive to no slewing. A slew boost and differential input voltage detection generates a second current at a first level when the first and second input voltages are approximately equal and to generate the second current at a second level, smaller than the first level, responsive to the first and second input voltages not being approximately equal. A voltage on a capacitor increases responsive to the first current from the output slew detection circuit increasing and responsive to the second current being at the second level. A current mirror is activated responsive to the voltage on the capacitor exceeding a second threshold. The current mirror decreases a third current of the input stage.Type: ApplicationFiled: December 20, 2017Publication date: June 20, 2019Inventors: Martijn Fridus SNOEIJ, Sudarshan UDAYASHANKAR
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Publication number: 20190158105Abstract: In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.Type: ApplicationFiled: December 27, 2018Publication date: May 23, 2019Inventors: Martijn Fridus SNOEIJ, Mikhail Valeryevich IVANOV, Roberto Giampiero MASSOLINI, Brian David JOHNSON
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Patent number: 10218374Abstract: In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.Type: GrantFiled: December 30, 2016Date of Patent: February 26, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Martijn Fridus Snoeij, Mikhail Valeryevich Ivanov, Roberto Giampiero Massolini, Brian David Johnson