Abstract: A III-nitride power semiconductor based heterojunction device comprising a substrate, a first terminal, a second terminal, a control terminal configured to receive an input switching signal during an active mode of operation and to not receive the input switching signal during a stand-by mode of operation, and an active heterojunction transistor formed on the substrate.

Abstract: Certain aspects of the present disclosure provide techniques and apparatus for beam selection using machine learning. A plurality of data samples corresponding to a plurality of data modalities is accessed. A plurality of features is generated by, for each respective data sample of the plurality of data samples, performing feature extraction based at least in part on a respective modality of the respective data sample. The plurality of features is fused using one or more attention-based models, and a wireless communication configuration is generated based on processing the fused plurality of features using a machine learning model.

Abstract: A method for producing a probe of a thermal flowmeter for measuring mass flow of a medium in a measuring tube, wherein a probe core is provided arranged loosely in a probe sleeve having a longitudinal axis, wherein the probe sleeve is deformed relative to the longitudinal axis completely radially in the direction of the probe core by means of high energy rate forming, wherein a material-locking connection between probe sleeve and probe core results and a rod is formed, wherein the rod represents a base body that is used for probe production, wherein a deformation speed reaches values greater than 100 m/s, and wherein the high energy rate forming includes explosive forming or magnetic forming.

Abstract: Described are polymerizable high energy light absorbing compounds of formula I: Wherein Y, Pg, R2, R3, R4, R5, and R6 are as described herein. The compounds absorb various wavelengths of ultraviolet and/or high energy visible light and are suitable for incorporation in various products, such as biomedical devices and ophthalmic devices.

Abstract: An actuator for aviation applications, in particular for adjusting rotor blades in a helicopter, may include an electromechanical drive assembly connected to an output drive via a downstream transmission, where the drive assembly is divided into sub-drives that can be operated independently, and where at least two sub-drives are spatially separated from one another in that the transmission is placed between these sub-drives. The transmission may include at least two harmonic gearings coupled to one another by at least one first coupling element, where a first harmonic gearing is located inside a non-rotating first housing, where a second harmonic gearing is located inside a rotating second housing, and where the second housing is connected to the output drive.

Abstract: Power semiconductor devices in GaN technology include an integrated auxiliary (double) gate terminal and a pulldown network to achieve a normally-off (E-Mode) GaN transistor with threshold voltage higher than 2V, low gate leakage current and enhanced switching performance. The high threshold voltage GaN transistor has a high-voltage active GaN device and a low-voltage auxiliary GaN device wherein the high-voltage GaN device has the gate connected to the source of the integrated auxiliary low-voltage GaN transistor and the drain being the external high-voltage drain terminal and the source being the external source terminal, while the low-voltage auxiliary GaN transistor has the gate (first auxiliary electrode) connected to the drain (second auxiliary electrode) functioning as an external gate terminal.

Abstract: An integrated circuit is provided which can sense the drain voltage of an active heterojunction transistor under different conditions and can adjust a driving signal of a gate terminal of the active heterojunction transistor in order to limit conduction losses and/or switching losses.

Abstract: The present disclosure relates to an edge detection circuit configured to receive an input signal comprising one or more falling or falling edges and provide an output signal comprising pulses or spikes corresponding to the one or more rising or falling edges. The edge detection circuit comprises a passive differentiator circuit configured to receive an input and provide a differentiator output signal that that is proportional to the rate of change of the input, and a comparator circuit operably connected to a voltage source. The comparator circuit is configured to receive the differentiator output signal, compare the differentiator output signal to a threshold voltage; and output a pulse or spike signal based on the comparison to the threshold voltage.

Abstract: We describe an integrated circuit is disclosed which can sense the drain voltage of an active heterojunction transistor under different conditions and can adjust a driving signal of a gate terminal of the active heterojunction transistor in order to limit conduction losses and/or switching losses.

Abstract: We describe a smart high voltage/power III-nitride semiconductor based diode or rectifier comprising first and second terminals, and further comprising an active device (e.g. a transistor such as a GaN HEMT transistor), a sensing device (e.g. a sensing diode/transistor), a sensing load (e.g. a resistor), wherein the smart high voltage/power III-nitride semiconductor based diode or rectifier is configured to output a sensing signal corresponding a current through the sensing device and/or a voltage drop across the sensing load, wherein the sensing signal is indicative of a current flowing between the first and second terminal when a bias is applied between the first and second terminals.

Abstract: A III-nitride semiconductor based heterojunction power device including: a first heterojunction transistor formed on a substrate, and a second heterojunction transistor formed on the substrate. One of the first heterojunction transistor and the second heterojunction transistor is an enhancement mode field effect transistor and the other one of the first heterojunction transistor and the second heterojunction transistor is a depletion mode field effect transistor. The enhancement mode transistor acts as a main power switch, and the depletion mode transistor acts as a start-up component.

Abstract: A heterojunction device having at least three terminals, the at least three terminals comprising a high voltage terminal, a low voltage terminal and a control terminal. The heterojunction device further comprises at least one main power heterojunction transistor, an auxiliary gate circuit comprising at least one first low-voltage heterojunction transistor, a pull-down circuit comprising a capacitor and a charging path for the capacitor. The heterojunction device further comprises at least one monolithically integrated component, wherein the capacitor is configured to provide an internal rail voltage for the at least one monolithically integrated component.

Abstract: We disclose a III-nitride semiconductor based heterojunction power device comprising: a first heterojunction transistor formed on a substrate (4) and a second heterojunction transistor formed on the substrate. The first heterojunction transistor comprises: first III-nitride semiconductor region formed over the substrate, wherein the first III-nitride semiconductor region comprises a first heterojunction comprising at least one two dimensional carrier gas; a first terminal (8) operatively connected to the first III-nitride semiconductor region; a second terminal (9) laterally spaced from the first terminal and operatively connected to the first III-nitride semiconductor region; and a first gate region (10) over the first III-nitride semiconductor region between the first and second terminals.

Abstract: The disclosure relates to power semiconductor devices in GaN technology. The disclosure proposes an integrated auxiliary (double) gate terminal and a pulldown network to achieve a normally-off (E-Mode) GaN transistor with threshold voltage higher than 2V, low gate leakage current and enhanced switching performance. The high threshold voltage GaN transistor has a high-voltage active GaN device and a low-voltage auxiliary GaN device wherein the high-voltage GaN device has the gate connected to the source of the integrated auxiliary low-voltage GaN transistor and the drain being the external high-voltage drain terminal and the source being the external source terminal, while the low-voltage auxiliary GaN transistor has the gate (first auxiliary electrode) connected to the drain (second auxiliary electrode) functioning as an external gate terminal.

Abstract: We disclose a Ill-nitride semiconductor based heterojunction power device, comprising: a first heterojunction transistor (19) formed on a substrate, the first heterojunction transistor comprising: a first Ill-nitride semiconductor region formed over the substrate, wherein the first Ill-nitride semiconductor region comprises a first heterojunction comprising at least one two dimensional carrier gas of second conductivity type; a first terminal (8) operatively connected to the first Ill-nitride semiconductor region; a second terminal (9) laterally spaced from the first terminal and operatively connected to the first Ill-nitride semiconductor region; a first gate terminal (10) formed over the first Ill-nitride semiconductor region between the first terminal and the second terminal.

Abstract: A method for producing a probe of a thermal flowmeter for measuring mass flow of a medium in a measuring tube, wherein a probe core is provided arranged loosely in a probe sleeve having a longitudinal axis, wherein the probe sleeve is deformed relative to the longitudinal axis completely radially in the direction of the probe core by means of high energy rate forming, wherein a material-locking connection between probe sleeve and probe core results and a rod is formed, wherein the rod represents a base body that is used for probe production, wherein a deformation speed reaches values greater than 100 m/s, and wherein the high energy rate forming includes explosive forming or magnetic forming.

Abstract: A device includes a heterojunction device, a unipolar power transistor operatively connected in series with said hetero junction device; an external control terminal for driving said unipolar power transistor and said heterojunction device; and an interface unit having a plurality of interface terminals. A first interface terminal is operatively connected to an active gate region of the heterojunction device and a second interface terminal is operatively connected to said external control terminal. The heterojunction device includes a threshold voltage less than a threshold voltage of the unipolar power transistor, wherein the threshold voltage of the heterojunction device is less than a blocking voltage of the unipolar power transistor.

Abstract: The disclosure relates to a III-nitride power semiconductor based heterojunction device including a low voltage terminal, a high voltage terminal, a control terminal and an active heterojunction transistor formed on a substrate, and further including the following monolithically integrated components: voltage clamp circuit configured to limit a maximum potential that can be applied to the internal gate terminal, an on-state circuit configured to control the internal gate terminal of the active heterojunction transistor during an on-state operation, a turn-off circuit configured to control the internal gate terminal of the active heterojunction transistor during a turn-off operation and during an off-state.

Abstract: Power semiconductor devices in GaN technology include an integrated auxiliary (double) gate terminal and a pulldown network to achieve a normally-off (E-Mode) GaN transistor with threshold voltage higher than 2V, low gate leakage current and enhanced switching performance. The high threshold voltage GaN transistor has a high-voltage active GaN device and a low-voltage auxiliary GaN device wherein the high-voltage GaN device has the gate connected to the source of the integrated auxiliary low-voltage GaN transistor and the drain being the external high-voltage drain terminal and the source being the external source terminal, while the low-voltage auxiliary GaN transistor has the gate (first auxiliary electrode) connected to the drain (second auxiliary electrode) functioning as an external gate terminal.

Abstract: In accordance with various embodiments, a method is performed at an electronic device including a display device and one or more input devices. The method includes displaying, on the display device, a first graphing area including a first section presenting a plot of a first set of data points for a first variable and a second section. The method includes detecting, via the one or more input devices, a user input indicative of a path within a second section. The method includes determining, based on the user input indicative of a path within the second section, a second set of data points for the first variable. The method includes determining, based at least on the second set of data points for the first variable, a set of data points for a second variable. The method includes displaying, on the display device, a second graphing area presenting a plot of the set of data points for the second variable.