Patents by Inventor MARTIN AYRES

MARTIN AYRES has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11643744
    Abstract: A method of processing a semiconductor wafer is provided. The method includes introducing the wafer to a main chamber via a loading port, using a transfer mechanism to transfer the wafer to a first wafer processing module in a stack so that the wafer is disposed substantially horizontally in the first wafer processing module with a front face facing upwards, and performing a processing step on the front face of the wafer in the first wafer processing module.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: May 9, 2023
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: John MacNeil, Martin Ayres, Trevor Thomas
  • Publication number: 20220155011
    Abstract: A spin rinse dryer for treating a substrate has an enclosure, a rotatable support for supporting the substrate, a rotatable member located within the enclosure above the rotatable support, and a drive for rotating the rotatable member. During cleaning of the wafer, liquid that splashes up from the wafer will strike the rotatable member, rather than the upper wall of the enclosure, and may form droplets on the rotatable member. After the flow of cleaning liquid has stopped, the drive can rotate the rotatable member at high speed, which tends to throw the liquid droplets off the rotatable member through centrifugal force. The liquid then runs down the walls of the enclosure, away from the wafer, so that there is a much reduced chance of contamination of the cleaned wafer. The rotatable member and support may be integrally formed and rotated together or may be separate members.
    Type: Application
    Filed: October 25, 2021
    Publication date: May 19, 2022
    Inventors: Trevor THOMAS, Martin Ayres
  • Patent number: 11236433
    Abstract: An apparatus for electrochemically processing a semiconductor substrate includes a processing chamber of the type that is sealable to a peripheral portion of a semiconductor substrate so as to define a covered processing volume. The semiconductor substrate is supported by a substrate support. A magnetic arrangement is disposed outside of the processing chamber and produces a magnetic field. The magnetic field is changed using a controller for controlling the magnetic arrangement. An agitator is disposed within the processing chamber. The agitator comprises a magnetically responsive element which is responsive to changes in the magnetic field of the magnetic arrangement so as to provide a reciprocating motion to the agitator.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: February 1, 2022
    Assignee: SPTS Technologies Limited
    Inventors: Martin Ayres, John MacNeil, Trevor Thomas
  • Publication number: 20210317592
    Abstract: A method of processing a semiconductor wafer is provided. The method includes introducing the wafer to a main chamber via a loading port, using a transfer mechanism to transfer the wafer to a first wafer processing module in a stack so that the wafer is disposed substantially horizontally in the first wafer processing module with a front face facing upwards, and performing a processing step on the front face of the wafer in the first wafer processing module.
    Type: Application
    Filed: June 24, 2021
    Publication date: October 14, 2021
    Inventors: JOHN MACNEIL, MARTIN AYRES, TREVOR THOMAS
  • Patent number: 11066754
    Abstract: An apparatus for processing a front face of a semiconductor wafer is provided. The apparatus includes a main chamber, at least one loading port connected to the main chamber for introducing the wafer to the main chamber, at least one stack of wafer processing modules, and a transfer mechanism for transferring the wafer between the loading port and the processing modules. The at least one stack of wafer processing modules includes three or more substantially vertically stacked wafer processing modules, wherein adjacent wafer processing modules in the stack have a vertical separation of less than 50 cm, and each processing module is configured to process the wafer when disposed substantially horizontally therein with the front face of the wafer facing upwards, and at least one wafer processing module is an electrochemical wafer processing module.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: July 20, 2021
    Assignee: SPTS Technologies Limited
    Inventors: John Macneil, Martin Ayres, Trevor Thomas
  • Publication number: 20200325588
    Abstract: An apparatus for electrochemically processing a semiconductor substrate includes a processing chamber of the type that is sealable to a peripheral portion of a semiconductor substrate so as to define a covered processing volume. The semiconductor substrate is supported by a substrate support. A magnetic arrangement is disposed outside of the processing chamber and produces a magnetic field. The magnetic field is changed using a controller for controlling the magnetic arrangement. An agitator is disposed within the processing chamber. The agitator comprises a magnetically responsive element which is responsive to changes in the magnetic field of the magnetic arrangement so as to provide a reciprocating motion to the agitator.
    Type: Application
    Filed: April 10, 2020
    Publication date: October 15, 2020
    Inventors: Martin Ayres, John MacNeil, Trevor Thomas
  • Publication number: 20180211856
    Abstract: An apparatus for processing a front face of a semiconductor wafer is provided. The apparatus includes a main chamber, at least one loading port connected to the main chamber for introducing the wafer to the main chamber, at least one stack of wafer processing modules, and a transfer mechanism for transferring the wafer between the loading port and the processing modules. The at least one stack of wafer processing modules includes three or more substantially vertically stacked wafer processing modules, wherein adjacent wafer processing modules in the stack have a vertical separation of less than 50 cm, and each processing module is configured to process the wafer when disposed substantially horizontally therein with the front face of the wafer facing upwards, and at least one wafer processing module is an electrochemical wafer processing module.
    Type: Application
    Filed: January 22, 2018
    Publication date: July 26, 2018
    Inventors: JOHN MACNEIL, MARTIN AYRES, TREVOR THOMAS