Abstract: A bit synchronizer for digital data signals capable of tracking phase errors of up to .+-.180.degree. without loss of lock. An input data signal is squared and then applied to a pair of D-type flip-flops. The flip-flops are alternately driven by a clock signal generated by a voltage controlled oscillator in a phase-locked loop. The flip-flops cause the input data to be shifted 0.degree. and 180.degree., respectively, with reference to the clock signal. The flip-flops are cross-coupled to a pair of exclusive-OR gates, in a manner such that as the phase error between the input signal and the clock signal increases or decreases, the pulse width out of one gate varies proportionately while the output of the other gate is a pulse which is always one-half the clock signal period. The phase relationship of the pulses out of the gates switch 180.degree. as the phase error traverses the 0.degree. point.