Patents by Inventor Martin Bernard
Martin Bernard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240134786Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for sparse tensor storage for neural network accelerators. An example apparatus includes sparsity map generating circuitry to generate a sparsity map corresponding to a tensor, the sparsity map to indicate whether a data point of the tensor is zero, static storage controlling circuitry to divide the tensor into one or more storage elements, and a compressor to perform a first compression of the one or more storage elements to generate one or more compressed storage elements, the first compression to remove zero points of the one or more storage elements based on the sparsity map and perform a second compression of the one or more compressed storage elements, the second compression to store the one or more compressed storage elements contiguously in memory.Type: ApplicationFiled: December 14, 2023Publication date: April 25, 2024Applicant: Intel CorporationInventors: Martin-Thomas Grymel, David Bernard, Niall Hanrahan, Martin Power, Kevin Brady, Gary Baugh, Cormac Brick
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Patent number: 11962342Abstract: A radio transmitting device configured to transmit a spread-spectrum radio signal wherein a carrier frequency changes in a predetermined set of radio channels according to a hopping sequence, the radio signal being organized in packets having each a header transmitted at a first channel in the hopping sequence comprising a detection sequence, and payload data encoding a message transmitted at following channels in the hopping sequence.Type: GrantFiled: June 22, 2022Date of Patent: April 16, 2024Assignee: Semtech CorporationInventors: Olivier Bernard André Seller, Baozhou Ning, Martin Wuthrich
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Publication number: 20240118992Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to debug a hardware accelerator such as a neural network accelerator for executing Artificial Intelligence computational workloads. An example apparatus includes a core with a core input and a core output to execute executable code based on a machine-learning model to generate a data output based on a data input, and debug circuitry coupled to the core. The debug circuitry is configured to detect a breakpoint associated with the machine-learning model, compile executable code based on at least one of the machine-learning model or the breakpoint. In response to the triggering of the breakpoint, the debug circuitry is to stop the execution of the executable code and output data such as the data input, data output and the breakpoint for debugging the hardware accelerator.Type: ApplicationFiled: October 16, 2023Publication date: April 11, 2024Applicant: Intel CorporationInventors: Martin-Thomas Grymel, David Bernard, Martin Power, Niall Hanrahan, Kevin Brady
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Publication number: 20240109841Abstract: This disclosure describes compounds of Formula (I), stereoisomers, side compounds thereof, pharmaceutical compositions and methods of manufacturing such compounds, using silylation reagents and producing compositions and products made using such methods. More particularly, this disclosure describes manufacture of trofinetide and side products, compositions and products containing such compounds, for pharmaceutical uses to treat neurodegenerative or neurodevelopmental disorders.Type: ApplicationFiled: November 21, 2023Publication date: April 4, 2024Inventors: Clive BLOWER, Matthew PETERSON, James Murray SHAW, James Anthony BONNAR, Etienne David Frank Philippe MONIOTTE, Martin Bernard Catherine BOUSMANNE, Cecilia BETTI, Karel Willy Luc DECROOS, Mimoun AYOUB
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Patent number: 11940907Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for sparse tensor storage for neural network accelerators. An example apparatus includes sparsity map generating circuitry to generate a sparsity map corresponding to a tensor, the sparsity map to indicate whether a data point of the tensor is zero, static storage controlling circuitry to divide the tensor into one or more storage elements, and a compressor to perform a first compression of the one or more storage elements to generate one or more compressed storage elements, the first compression to remove zero points of the one or more storage elements based on the sparsity map and perform a second compression of the one or more compressed storage elements, the second compression to store the one or more compressed storage elements contiguously in memory.Type: GrantFiled: June 25, 2021Date of Patent: March 26, 2024Assignee: INTEL CORPORATIONInventors: Martin-Thomas Grymel, David Bernard, Niall Hanrahan, Martin Power, Kevin Brady, Gary Baugh, Cormac Brick
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Patent number: 11866406Abstract: This disclosure describes compounds of Formula (I), stereoisomers, side compounds thereof, pharmaceutical compositions and methods of manufacturing such compounds, using silylation reagents and producing compositions and products made using such methods. More particularly, this disclosure describes manufacture of trofinetide and side products, compositions and products containing such compounds, for pharmaceutical uses to treat neurodegenerative or neurodevelopmental disorders.Type: GrantFiled: June 23, 2022Date of Patent: January 9, 2024Assignee: NEUREN PHARMACEUTICALS LIMITEDInventors: Clive Blower, Mathew Peterson, James Murray Shaw, James Anthony Bonnar, Etienne David Frank Philippe Moniotte, Martin Bernard Catherine Bousmanne, Cecilia Betti, Karel Willy Luc Decroos, Mimoun Ayoub
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Patent number: 11827600Abstract: This disclosure provides crystalline forms of trofinetide and trofinetide hydrate, pharmaceutical compositions comprising crystalline forms of trofinetide and trofinetide hydrate, methods of making crystalline forms of trofinetide or trofinetide hydrate, and methods of treating a disease, condition, or disorder in a subject comprising administering a composition comprising crystalline forms of trofinetide or trofinetide hydrate to the subject.Type: GrantFiled: July 12, 2022Date of Patent: November 28, 2023Assignee: Acadia Pharmaceuticals Inc.Inventors: Matthew Peterson, Marlon Carlos, Martin Bernard Catherine Bousmanne, Cecilia Betti, David T. Jonaitis, Lisa M. McCracken, Lisa M. Grove
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Patent number: 11628032Abstract: A package includes a tray and a cover configured to seal an open end of the tray when the cover is assembled onto the tray. The tray has a flange extending about a periphery at the open end of the tray. A continuous barrier seal is formed between the flange and the cover when the cover is assembled onto the tray, and a discontinuous sacrificial seal is also formed between the flange and the cover when the cover is assembled onto the tray. The discontinuous sacrificial seal is configured to absorb stress applied to the flange. The continuous barrier seal is disposed closer to an inner periphery of the flange than the discontinuous sacrificial seal. Holes are formed on the corners of the flange, and the holes are spaced apart from the discontinuous sacrificial seal.Type: GrantFiled: July 29, 2020Date of Patent: April 18, 2023Assignee: MEDTRONIC VASCULAR, INC.Inventors: Thomas Hayden, Joshua Hillas, Martin Bernard Patten
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Publication number: 20230023114Abstract: This disclosure provides crystalline forms of trofinetide and trofinetide hydrate, pharmaceutical compositions comprising crystalline forms of trofinetide and trofinetide hydrate, methods of making crystalline forms of trofinetide or trofinetide hydrate, and methods of treating a disease, condition, or disorder in a subject comprising administering a composition comprising crystalline forms of trofinetide or trofinetide hydrate to the subject.Type: ApplicationFiled: July 12, 2022Publication date: January 26, 2023Inventors: Matthew PETERSON, Marlon CARLOS, Martin Bernard Catherine BOUSMANNE, Cecilia BETTI, David T. JONAITIS, Lisa M. MCCRACKEN, Lisa M. GROVE
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Patent number: 11488612Abstract: The present technology can receive audio segments from sources within one or more conference room, and can create audio fingerprints from the sources. The audio fingerprints are optimized for audio in conference room environments, which include distortions from room impulse responses, and various encoding used by telecommunication networks. In some embodiments, when two audio segments are matched, a user equipment can be instructed to mute its speakers to avoid feedback. In some embodiments, when two audio segments are matched, a user equipment can be given instructions to join a conference taking place in the room in when the audio segment originated.Type: GrantFiled: October 30, 2020Date of Patent: November 1, 2022Assignee: CISCO TECHNOLOGY, INC.Inventors: Michael A. Ramalho, Jonathan Rosenberg, Keith Griffin, Niall L McDonnell, Liam Frawley, Martin Bernard Feeney
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Publication number: 20220324799Abstract: This disclosure describes compounds of Formula (I), stereoisomers, side compounds thereof, pharmaceutical compositions and methods of manufacturing such compounds, using silylation reagents and producing compositions and products made using such methods. More particularly, this disclosure describes manufacture of trofinetide and side products, compositions and products containing such compounds, for pharmaceutical uses to treat neurodegenerative or neurodevelopmental disorders.Type: ApplicationFiled: June 23, 2022Publication date: October 13, 2022Inventors: CLIVE BLOWER, MATHEW PETERSON, JAMES MURRAY SHAW, JAMES ANTHONY BONNAR, ETIENNE DAVID FRANK PHILIPPE MONIOTTE, MARTIN BERNARD CATHERINE BOUSMANNE, CECILIA BETTI, KAREL WILLY LUC DECROOS, MIMOUN AYOUB
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Patent number: 11370755Abstract: This disclosure describes compounds of Formula (I), stereoisomers, side compounds thereof, pharmaceutical compositions and methods of manufacturing such compounds, using silylation reagents and producing compositions and products made using such methods. More particularly, this disclosure describes manufacture of trofinetide and side products, compositions and products containing such compounds, for pharmaceutical uses to treat neurodegenerative or neurodevelopmental disorders.Type: GrantFiled: June 14, 2021Date of Patent: June 28, 2022Assignee: NEUREN PHARMACEUTICALS LIMITEDInventors: Clive Blower, Mathew Peterson, James Murray Shaw, James Anthony Bonnar, Etienne David Frank Philippe Moniotte, Martin Bernard Catherine Bousmanne, Cecilia Betti, Karel Willy Luc Decroos, Mimoun Ayoub
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Patent number: 11314565Abstract: A method for executing a virtualized application on a computing system that includes a user-space and a kernel-space is disclosed. The method includes executing an application in the user-space, executing a user-level virtualization layer in the user-space, the user-level virtualization layer including a set of rules, performing, via the user-level virtualization layer, user-level hooking of events that are generated by the executing application according to the set of rules to identify events of interest, and determining whether to allow or block a function corresponding to an event that is identified as an event of interest based on the set of rules in the user-level virtualization layer.Type: GrantFiled: February 2, 2018Date of Patent: April 26, 2022Assignee: DATA ACCELERATOR LTDInventors: Priya Saxena, Jason Efstathiou, Martin Bernard Kirkby, Matthew Philip Clothier
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Publication number: 20220055987Abstract: This disclosure describes compounds of Formula (I), stereoisomers, side compounds thereof, pharmaceutical compositions and methods of manufacturing such compounds, using silylation reagents and producing compositions and products made using such methods. More particularly, this disclosure describes manufacture of trofinetide and side products, compositions and products containing such compounds, for pharmaceutical uses to treat neurodegenerative or neurodevelopmental disorders.Type: ApplicationFiled: June 14, 2021Publication date: February 24, 2022Inventors: CLIVE BLOWER, MATHEW PETERSON, JAMES MURRAY SHAW, JAMES ANTHONY BONNAR, ETIENNE DAVID FRANK PHILIPPE MONIOTTE, MARTIN BERNARD CATHERINE BOUSMANNE, CECILIA BETTI, KAREL WILLY LUC DECROOS, MIMOUN AYOUB
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Patent number: 11237857Abstract: A method for executing a virtualized application on a computing system that includes a user-space and a kernel-space is disclosed. In an embodiment, the method involves executing an application in the user-space, executing a user-level virtualization layer in the user-space, the user-level virtualization layer including a set of rules, performing, via the user-level virtualization layer, user-level hooking of events that are generated by the executing application according to the set of rules to identify events of interest, storing events that are identified as events of interest in a database, applying a pattern recognition process to the events that are stored in the database, generating a rule for the set of rules in the user-level virtualization layer based on the pattern recognition process, and applying the generated rule through the user-level virtualization layer.Type: GrantFiled: February 2, 2018Date of Patent: February 1, 2022Assignee: Data Accelerator LtdInventors: Priya Saxena, Jason Efstathiou, Martin Bernard Kirkby, Matthew Philip Clothier
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Publication number: 20210050026Abstract: The present technology can receive audio segments from sources within one or more conference room, and can create audio fingerprints from the sources. The audio fingerprints are optimized for audio in conference room environments, which include distortions from room impulse responses, and various encoding used by telecommunication networks. In some embodiments, when two audio segments are matched, a user equipment can be instructed to mute its speakers to avoid feedback. In some embodiments, when two audio segments are matched, a user equipment can be given instructions to join a conference taking place in the room in when the audio segment originated.Type: ApplicationFiled: October 30, 2020Publication date: February 18, 2021Inventors: Michael A. Ramalho, Jonathan Rosenberg, Keith Griffin, Niall L McDonnell, Liam Frawley, Martin Bernard Feeney
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Publication number: 20210030506Abstract: A package includes a tray and a cover configured to seal an open end of the tray when the cover is assembled onto the tray. The tray has a flange extending about a periphery at the open end of the tray. A continuous barrier seal is formed between the flange and the cover when the cover is assembled onto the tray, and a discontinuous sacrificial seal is also formed between the flange and the cover when the cover is assembled onto the tray. The discontinuous sacrificial seal is configured to absorb stress applied to the flange. The continuous barrier seal is disposed closer to an inner periphery of the flange than the discontinuous sacrificial seal. Holes are formed on the corners of the flange, and the holes are spaced apart from the discontinuous sacrificial seal.Type: ApplicationFiled: July 29, 2020Publication date: February 4, 2021Inventors: Thomas HAYDEN, Joshua HILLAS, Martin Bernard PATTEN
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Patent number: 10825460Abstract: The present technology can receive audio segments from sources within one or more conference room, and can create audio fingerprints from the sources. The audio fingerprints are optimized for audio in conference room environments, which include distortions from room impulse responses, and various encoding used by telecommunication networks. In some embodiments, when two audio segments are matched, a user equipment can be instructed to mute its speakers to avoid feedback. In some embodiments, when two audio segments are matched, a user equipment can be given instructions to join a conference taking place in the room in when the audio segment originated.Type: GrantFiled: July 3, 2019Date of Patent: November 3, 2020Assignee: CISCO TECHNOLOGY, INC.Inventors: Michael A. Ramalho, Jonathan Rosenberg, Keith Griffin, Niall L McDonnell, Liam Frawley, Martin Bernard Feeney
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Publication number: 20180181451Abstract: A method for executing a virtualized application on a computing system that includes a user-space and a kernel-space is disclosed. The method includes executing an application in the user-space, executing a user-level virtualization layer in the user-space, the user-level virtualization layer including a set of rules, performing, via the user-level virtualization layer, user-level hooking of events that are generated by the executing application according to the set of rules to identify events of interest, and determining whether to allow or block a function corresponding to an event that is identified as an event of interest based on the set of rules in the user-level virtualization layer.Type: ApplicationFiled: February 2, 2018Publication date: June 28, 2018Applicant: DATA ACCELERATOR LTDInventors: Priya Saxena, Jason Efstathiou, Martin Bernard Kirkby, Matthew Philip Clothier
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Publication number: 20180157524Abstract: A method for executing a virtualized application on a computing system that includes a user-space and a kernel-space is disclosed. In an embodiment, the method involves executing an application in the user-space, executing a user-level virtualization layer in the user-space, the user-level virtualization layer including a set of rules, performing, via the user-level virtualization layer, user-level hooking of events that are generated by the executing application according to the set of rules to identify events of interest, storing events that are identified as events of interest in a database, applying a pattern recognition process to the events that are stored in the database, generating a rule for the set of rules in the user-level virtualization layer based on the pattern recognition process, and applying the generated rule through the user-level virtualization layer.Type: ApplicationFiled: February 2, 2018Publication date: June 7, 2018Applicant: DATA ACCELERATOR LTDInventors: Priya Saxena, Jason Efstathiou, Martin Bernard Kirkby, Matthew Philip Clothier