Patents by Inventor Martin Cieslak

Martin Cieslak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6826599
    Abstract: Techniques for handling objects in a network cache are described. A cost function value is calculated for each of a plurality of data objects. The cost function value relates to at least one metric relating to a total time required to download a corresponding one of the plurality of data objects. Each of the plurality of data objects are handled by the network cache according to its cost function value.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: November 30, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Shmuel Shaffer, James A. Aviani, Jr., Martin Cieslak
  • Patent number: 6683873
    Abstract: Methods and apparatus are described for controlling packet flow to a cache system is disclosed. A packet flow intended for a first destination is received into the cache system. When the packet flow indicates the start of the packet flow or when the packet flow is identified as being owned by the cache system, the packet flow is processed within the cache system. When the packet flow does not indicate the start of the packet flow and the packet flow is not identified as being owned by the cache system, the packet flow is directed back to the first destination.
    Type: Grant
    Filed: January 3, 2000
    Date of Patent: January 27, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Danny Kwok, Gurumukh S. Tiwana, James A. Aviani, Jr., Martin Cieslak, Martin A. Kagan
  • Patent number: 6240461
    Abstract: A method is described herein for facilitating data transmission in a network. A first data request is received at a first intermediate platform, the first data request indicating a source platform and a destination platform. The first data request is redirected by the first intermediate platform to a first cache platform associated with the intermediate platform. Data corresponding to the first data request is transmitted from the first cache platform to the source platform. The data indicates origination from the destination platform.
    Type: Grant
    Filed: October 8, 1997
    Date of Patent: May 29, 2001
    Assignee: Cisco Technology, Inc.
    Inventors: Martin Cieslak, John Mayes, Ricky Kwong Lowe
  • Patent number: 6147996
    Abstract: A pipelined multiple issue architecture for a link layer or protocol layer packet switch, which processes packets independently and asynchronously, but reorders them into their original order, thus preserving the original incoming packet order. Each stage of the pipeline waits for the immediately previous stage to complete, thus causing the packet switch to be self-throttling and thus allowing differing protocols and features to use the same architecture, even if possibly requiring differing processing times. The multiple issue pipeline is scaleable to greater parallel issue of packets, and tunable to differing switch engine architectures, differing interface speeds and widths, and differing clock rates and buffer sizes.
    Type: Grant
    Filed: August 4, 1995
    Date of Patent: November 14, 2000
    Assignee: Cisco Technology, Inc.
    Inventors: Michael Laor, Martin Cieslak