Abstract: A method and apparatus for testing a digital device. An apparatus for facilitating testing a digital device comprises a flat-top socket and a flat-top carrier board. The flat-top socket has a recess for accepting a carrier board, the recess having electrical contacts disposed in a pattern matching a pattern on a digital device. The flat-top carrier board also has a pattern of electrical contacts that match those on a digital device. A further embodiment provides an apparatus for facilitating testing of a digital device. The apparatus includes a digital device electrically and mechanically attached to a flip-chip carrier and also includes a flip-chip socket having an interface for connecting with the flip-chip carrier and an existing socket.

Abstract: A method and apparatus for testing a package-on-package digital device is provided. The method includes the steps of: affixing a top device onto a wing board; affixing a bottom device onto the wing board; connecting the top side solderballs of the bottom package to the bond fingers of the wing board. The wing board is then mounted onto a flat top socket. Once the mounting has been completed, the testing begins, and may use a solid immersion lens or optical diagnostic tool. The configuration of the flat top socket and wing board allows the optical diagnostic tool full access to the bottom device for the testing process and failure analysis.

Abstract: Systems, methods, devices, and computer program products are described for allowing optical backside failure analysis of a wire-bonded semiconductor device concurrent with electrical testing of the device. For example, a semiconductor device is prepared and mounted in the optical testing subsystem, such that a circuit region of the device is exposed to an optical testing environment, and an analog to the original array of the device is presented via the optical testing subsystem as a derived array. The electrical testing subsystem converts the derived array to a test array, and presents the test array in a way that is physically and electrically compatible with a test socket of an electrical testing environment. By coupling the electrical testing subsystem with the optical testing subsystem, a pin-to-pin coupling may be effectuated between the test array of the test socket and bonding locations on the device corresponding to the device's original array.