Abstract: The disclosure relates an enhanced security feature that protects the data stored in an integrated circuit inside a device from reprogramming by software. A lock circuit, which resides outside the integrated circuit, provides a one-time programmable (OTP) solution that can be implemented using a fuse, a transistor, and a resistor, which are standard, off-the-shelf, discrete, board-level parts. After memory inside the integrated circuit has been programmed, the transistor can be turned on to blow the fuse, which permanently sets an external pin of the integrated circuit to a logical low voltage. The memory inside the integrated circuit is protected from further programming so long as the external pin has a logical low voltage. Since the fuse has been physically blown, the memory inside the integrated circuit is protected from undesirable changes by malicious software.

Abstract: A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the boost mode to charge the capacitor to a capacitor voltage greater than the input voltage. When the input voltage is less than the predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the buck mode to supply the energy stored on the capacitor to the inductor to provide a regulated voltage less than the capacitor voltage as the hold-up voltage to the first node.

Abstract: A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the boost mode to charge the capacitor to a capacitor voltage greater than the input voltage. When the input voltage is less than the predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the buck mode to supply the energy stored on the capacitor to the inductor to provide a regulated voltage less than the capacitor voltage as the hold-up voltage to the first node.

Abstract: A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured in the boost mode to drive the low-side power switch with constant on-time pulses and to charge the energy storage capacitor under non-synchronous operation. When the input voltage is less than a predetermined threshold, the buck-boost control circuit is configured in the buck mode to drive the high-side power switch with constant on-time pulses and to drive the low-side power switch under synchronous operation to provide the hold-up voltage to the first node.

Abstract: A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured in the boost mode to drive the low-side power switch with constant on-time pulses and to charge the energy storage capacitor under non-synchronous operation. When the input voltage is less than a predetermined threshold, the buck-boost control circuit is configured in the buck mode to drive the high-side power switch with constant on-time pulses and to drive the low-side power switch under synchronous operation to provide the hold-up voltage to the first node.

Abstract: A compensation circuit in a monolithic switching regulator controller being incorporated in a closed loop feedback system of a switching regulator includes an amplifier configured in a unity gain feedback configuration with a first resistor and including a non-inverting input terminal receiving the feedback voltage and an inverting input terminal coupled to a first terminal of the switching regulator controller. The compensation circuit further includes a first capacitor and a third resistor connected in series between an input terminal and an output terminal of an error amplifier of the switching regulator controller. The first capacitor and the third resistor introduce a first zero in the closed loop feedback system. When a second capacitor is coupled to the first terminal of the switching regulator controller, a second zero is introduced in the closed loop feedback system. The second capacitor is an off-chip capacitor formed external to the monolithic switching regulator controller.

Abstract: A control circuit is incorporated in a switching regulator for monitoring and maintaining a bootstrap voltage to allow the switching regulator to operate at or near 100% duty cycle. The control circuit includes a circuit receiving the bootstrap voltage and generating a monitor voltage, a comparator circuit receiving the monitor voltage and a first voltage indicative of a switching output voltage and generating an output signal having a first state when the monitor voltage is equal to or less than the first voltage, a logic circuit receiving the output signal and generating drive control signals to driver circuits driving the high-side and low-side power switches. The logic circuit generates the drive control signals in response to the output signal of the comparator circuit having the first state to cause the high-side power switch to turn off and the low-side power switch to turn on, thereby recharging the bootstrap voltage.