Patents by Inventor Martin F. Galinski, III

Martin F. Galinski, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Last gasp hold-up circuit using adaptive constant on time control
    Patent number: 9335772
    Abstract: A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the boost mode to charge the capacitor to a capacitor voltage greater than the input voltage. When the input voltage is less than the predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the buck mode to supply the energy stored on the capacitor to the inductor to provide a regulated voltage less than the capacitor voltage as the hold-up voltage to the first node.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: May 10, 2016
    Assignee: Micrel, Inc.
    Inventor: Martin F. Galinski, III
  • LAST GASP HOLD-UP CIRCUIT USING ADAPTIVE CONSTANT ON TIME CONTROL
    Publication number: 20150198958
    Abstract: A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the boost mode to charge the capacitor to a capacitor voltage greater than the input voltage. When the input voltage is less than the predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the buck mode to supply the energy stored on the capacitor to the inductor to provide a regulated voltage less than the capacitor voltage as the hold-up voltage to the first node.
    Type: Application
    Filed: January 12, 2015
    Publication date: July 16, 2015
    Inventor: Martin F. Galinski, III
  • Last gasp hold-up circuit using adaptive constant on time control
    Patent number: 8957655
    Abstract: A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured in the boost mode to drive the low-side power switch with constant on-time pulses and to charge the energy storage capacitor under non-synchronous operation. When the input voltage is less than a predetermined threshold, the buck-boost control circuit is configured in the buck mode to drive the high-side power switch with constant on-time pulses and to drive the low-side power switch under synchronous operation to provide the hold-up voltage to the first node.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: February 17, 2015
    Assignee: Micrel, Inc.
    Inventor: Martin F. Galinski, III
  • Last Gasp Hold-Up Circuit Using Adaptive Constant On Time Control
    Publication number: 20130241503
    Abstract: A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured in the boost mode to drive the low-side power switch with constant on-time pulses and to charge the energy storage capacitor under non-synchronous operation. When the input voltage is less than a predetermined threshold, the buck-boost control circuit is configured in the buck mode to drive the high-side power switch with constant on-time pulses and to drive the low-side power switch under synchronous operation to provide the hold-up voltage to the first node.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 19, 2013
    Applicant: MICREL, INC.
    Inventor: Martin F. Galinski, III
  • Control circuit for monitoring and maintaining a bootstrap voltage in an N-channel buck regulator
    Patent number: 7145316
    Abstract: A control circuit is incorporated in a switching regulator for monitoring and maintaining a bootstrap voltage to allow the switching regulator to operate at or near 100% duty cycle. The control circuit includes a circuit receiving the bootstrap voltage and generating a monitor voltage, a comparator circuit receiving the monitor voltage and a first voltage indicative of a switching output voltage and generating an output signal having a first state when the monitor voltage is equal to or less than the first voltage, a logic circuit receiving the output signal and generating drive control signals to driver circuits driving the high-side and low-side power switches. The logic circuit generates the drive control signals in response to the output signal of the comparator circuit having the first state to cause the high-side power switch to turn off and the low-side power switch to turn on, thereby recharging the bootstrap voltage.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: December 5, 2006
    Assignee: Micrel, Inc.
    Inventor: Martin F. Galinski, III