Abstract: A method of driving a semiconductor switching element includes applying a drive signal configured to switch the semiconductor element such that a change in the charge stored on the drive electrode occurs over time, the drive signal having one or more predetermined parameters that define a time profile of the drive signal. The method also includes determining a deviation between an ideal switching instant of the semiconductor switching element and an actual switching instant of the semiconductor switching element, the ideal switching instant defined in reference to the time profile of the drive signal and/or a signal having a characteristic that is dependent on the time profile of the drive signal. The method further includes changing at least one of the predetermined parameters of the drive signal for a next switching operation based on the determined deviation.

Abstract: A signal transmission arrangement includes a transformer and a receiver circuit. The transformer has at least one primary winding and at least one secondary winding, each having first and second connections. The receiver circuit is connected to the secondary winding, and has an input and at least one output. The receiver circuit also has a differential input resistance approximating a short circuit. The receiver circuit is configured to convert a current pulse received at the input via the secondary winding to a voltage provided at the at least one output.

Abstract: A method and an apparatus for data transmission via a transmission path having at least two inductive transformers, which each have a primary winding with a time constant and have a secondary winding. The method includes driving the primary windings to transmit an information event by means of drive signals in such a way that the sum of the drive signals follows an envelope curve with an envelope curve duration. The envelope curve being chosen such that its time profile rises within a rise period from an initial value to a maximum value and falls within a fall period from the maximum value back to the initial value, and the magnitudes of the rise period and of the fall period are longer than the time constants of the primary windings. The time profile of the drive signals being dependent on the information to be transmitted and being chosen such that there is at least one steep flank, whose flank duration is shorter than the time constants of the primary windings.

Abstract: The present invention relates to a drive circuit for a switch (T) connected to a rectifier arrangement in a switching converter which provides an output voltage (Vout) from an input voltage (Vin), the drive circuit having the following features: a controller arrangement (40) having at least one control amplifier (OTA1) and a compensation network (41) having at least one capacitor (C4, C5), a signal dependent on the output voltage (Vout) being fed to said controller arrangement and the latter providing a control signal (S4), a protection circuit (30), which is designed to detect at least one critical state of the switching converter and which provides a protection signal (S3) in a manner dependent on the presence of a critical state, the protection circuit (30) having a discharge circuit (32) coupled to the compensation network (41), a signal generating circuit (20), to which the control signal (S4) and the protection signal (S3) are fed and which provides a drive signal (S5) having drive pulses according t

Abstract: A half-bridge circuit has first and second semiconductor switches, which have load paths connected in series and which are driven in dependence on an input signal that is applied to an input terminal. At least one first drive circuit is provided, which is connected to the control connection of the first semiconductor switch and which makes a first drive signal available. The first drive signal is dependent on the input signal and on a current from or to the control connection of the second semiconductor switch.

Abstract: A method for driving a switch in a power factor correction circuit comprises the step of generating a switch-on level of a drive signal of the switch for a switch-on duration dependent on a control signal, and the step of generating a switch-off level of the drive signal after the switch-on time has elapsed. The method further comprises the step of detecting a predetermined storage state of an inductive energy storage element after the switch-on duration has elapsed. In addition, the method comprises waiting until the end of a waiting duration, which is at least approximately proportional to the time duration between the beginning of the switch-on level and the detection of the predetermined storage state, before a renewed generation of a switch-on level, the waiting duration being dependent on the control signal. A drive circuit is also disclosed for providing a drive signal according to the method.

Abstract: The present invention relates to a method for operating a switching converter which has input terminals for the application of an input voltage, output terminals for the provision of an output voltage, a series circuit comprising an inductive energy storage element and a switch driven in clocked fashion, said series circuit being coupled to the input terminals, and a rectifier circuit, which couples the inductive energy storage element to the output terminals, and in which a control signal dependent on the output voltage is generated. The method provides for operating the switching converter in a manner dependent on the magnetization duration of the inductive energy storage element during a drive period of the switch in the free-running or fixedly clocked operating state. The invention additionally relates to a drive circuit for driving a switch in a switching converter for carrying out this method.

Abstract: The invention relates to a method for detection of non-zero-voltage switching operation of a lamp ballast, which has a half-bridge circuit with a first and a second semiconductor switching element, a resonant tuned circuit which is connected to one output of the half-bridge circuit, and a snubber capacitance, which is connected in parallel with one of the semiconductor switching elements. The method has the following method steps: provision of a voltage measurement signal (Vs) which is dependent on a voltage at the output of the half-bridge, evaluation of the voltage measurement signal (Vs) in each case before switching-on times of at least one of the first and second semiconductor switching elements by comparison of the voltage measurement signal (Vs) with a reference value (Vref) for detection of the non-zero-voltage switching operation. The invention also relates to a ballast for carrying out a method such as this.

Abstract: The invention relates to a drive circuit for at least one fluorescent lamp (10) which has the following features: a half-bridge circuit (Q1, Q2) for production of a supply voltage (V2), a resonant tuned circuit (L1, C1) which is coupled to the half-bridge circuit (Q1, Q2) and to which the at least one fluorescent lamp (10) can be connected, a diagnosis circuit (30) with a resistance element (R1) which is coupled to the resonant tuned circuit (L1, C1), at least one current/voltage converter (31) which is connected to the resistance element (R1) and produces at least one measurement voltage (V31; V311, V312) from a current (I1) flowing through the resistance element, and an evaluation circuit (32) which is connected to the current/voltage converter (31) and is supplied with the at least one measurement voltage (V31; V311, V312), and to a method for diagnosis of a fluorescent lamp.

Abstract: A method for operating a switch, which is connected in series with a primary coil of a transformer in a free-running switch mode power supply, includes the provision of a modulation signal and the provision of a drive signal for the switch. The drive signal includes a recurrent pulse sequence which has at least one first switching-on pulse with a first pulse duration and at least one second switching-on pulse with a second pulse duration, and with the pulse duration of at least one of the switching-on pulses being modulated by the modulation signal within a range of valves which is predetermined by the control signal.

Abstract: The invention relates to an actuation circuit for a switch (SW) controlling the power consumption in a switch-mode converter which has input terminals (K1, K2) for applying an input voltage (Vin) and output terminals (K3, K4) for providing an output voltage. The actuation circuit (100) comprises a first input (K11) for supplying a voltage measurement signal (Vs) which is dependent on the output voltage (Vout), an error signal generation circuit (10) which generates an error signal (S10) by comparing the voltage measurement signal (Vs) with a reference signal (Vref), a filter arrangement (20) which is supplied with the error signal (S10) and which generates a first control signal (S1), and an actuation signal generation circuit (30) which is supplied with the first control signal (S1) and which provides an actuation signal (PWM) for the switch (SW) on the basis of the first control signal (S1).

Abstract: The invention relates to a component arrangement which has the following features: a semiconductor body (10), a dielectric layer (20) which is applied to one face of the semiconductor body (10), a planar transformer with a primary winding (40) and a secondary winding (30), which are isolated from one another by the dielectric layer (20) and are arranged at a distance from one another in a vertical direction with respect to the one face of the semiconductor body, a first planar winding section (31) and a second planar winding section (32) of the secondary winding (30), which are arranged at a distance from one another in the vertical direction and are electrically conductively connected to one another, with a first connection (34) of the first winding section (31) forming a first connection of the secondary winding, and a first connection (36) of the second winding section (32) forming a second connection of the secondary winding.

Abstract: The invention relates to a method for driving a first semiconductor switching element (T1), the load path of which is connected in series with a load path of a second semiconductor switching element (T2) in a half-bridge circuit and which is driven in the on state or in the off state according to switching signals (S40) transmitted via a transmission channel (30). The method has the following method steps: detection of a load current (I1) through the half-bridge circuit, repetition of a switching signal transmitted last if the load current exceeds a predetermined maximum threshold value. The invention additionally relates to a circuit arrangement having a half-bridge for carrying out such a method.

Abstract: The present invention relates to a method for operating a switching converter which has input terminals for the application of an input voltage, output terminals for the provision of an output voltage, a series circuit comprising an inductive energy storage element and a switch driven in clocked fashion, said series circuit being coupled to the input terminals, and a rectifier circuit, which couples the inductive energy storage element to the output terminals, and in which a control signal dependent on the output voltage is generated. The method provides for operating the switching converter in a manner dependent on the magnetization duration of the inductive energy storage element during a drive period of the switch in the free-running or fixedly clocked operating state. The invention additionally relates to a drive circuit for driving a switch in a switching converter for carrying out this method.

Abstract: A method for driving a switch in a power factor correction circuit comprises the step of generating a switch-on level of a drive signal of the switch for a switch-on duration dependent on a control signal, and the step of generating a switch-off level of the drive signal after the switch-on time has elapsed. The method further comprises the step of detecting a predetermined storage state of an inductive energy storage element after the switch-on duration has elapsed. In addition, the method comprises waiting until the end of a waiting duration, which is at least approximately proportional to the time duration between the beginning of the switch-on level and the detection of the predetermined storage state, before a renewed generation of a switch-on level, the waiting duration being dependent on the control signal. A drive circuit is also disclosed for providing a drive signal according to the method.

Abstract: The invention relates to a method for driving a semiconductor switching element whose switching state is a function of a charge stored on a drive electrode, and which comprises the method steps of: applying a drive signal for switching the semiconductor element, which is selected such that a change in the charge stored on the drive electrode occurs over time, signal parameters that define the time profile of the drive signal being permanently prescribed for the switching operation, determining an ideal switching instant of the semiconductor switching element with reference to the time profile of the drive signal or of a signal dependent thereon, determining whether the actual switching instant of the semiconductor switching element with reference to the time profile of the drive signal or of the signal dependent thereon deviates from the ideal switching instant, and changing at least one parameter of the drive signal for a next switching operation when a deviation has been determined.

Abstract: A circuit configuration for the switch-on/off control of a DMOS power transistor has at least one first gate electrode and, separate from the latter, a second gate electrode, which are capacitively coupled to one another by a capacitance distributed over the field-effect transistor and which can be driven via separate external gate electrode terminals. The circuit configuration has two individual driver circuits and a generating circuit in order to feed a first drive signal to the first gate electrode and a second drive signal to the second gate electrode, the second drive signal being delayed with respect to the first drive signal.

Abstract: The invention relates to a drive circuit for providing a drive signal (S3) for a switch in a switching converter in a manner dependent on a control signal (S2), the drive circuit comprising at least two groups (22, 30) of circuit components, each group having at least one circuit component, and the circuit components being coupled to one another and designed to provide the drive signal (S3) from the control signal (S2). In this case, voltage is supplied to the circuit components of the first group by means of the control signal, while voltage is supplied to the circuit components of the second group (30) by means of a supply voltage at a supply terminal (K2).

Abstract: The present invention relates to a drive circuit for a switch (T) connected to a rectifier arrangement in a switching converter which provides an output voltage (Vout) from an input voltage (Vin), the drive circuit having the following features: a controller arrangement (40) having at least one control amplifier (OTA1) and a compensation network (41) having at least one capacitor (C4, C5), a signal dependent on the output voltage (Vout) being fed to said controller arrangement and the latter providing a control signal (S4), a protection circuit (30), which is designed to detect at least one critical state of the switching converter and which provides a protection signal (S3) in a manner dependent on the presence of a critical state, the protection circuit (30) having a discharge circuit (32) coupled to the compensation network (41), a signal generating circuit (20), to which the control signal (S4) and the protection signal (S3) are fed and which provides a drive signal (S5) having drive pulses according

Abstract: A half-bridge circuit includes: a vertically designed n-conducting first MOS transistor that is integrated in a first semiconductor body having a front side and a rear side; and a vertically designed p-conducting second MOS transistor that is integrated in a second semiconductor body having a front side and a rear side. The first and second transistors are connected in series between a first connection terminal and a second connection terminal. The half-bridge circuit also includes a drive circuit for driving the first and second transistors. The first and second transistors are applied to a common connection plate.