Patents by Inventor Martin G. Forrester

Martin G. Forrester has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7876661
    Abstract: An apparatus that provides for non-destructive readback of a ferroelectric material. The apparatus can include a ferroelectric layer with a scannable surface wherein the ferroelectric layer has a compensation charge adjacent the scannable surface. The apparatus also can include an electrode adjacent the scannable surface to sense the compensation charge. A related method is also disclosed.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: January 25, 2011
    Assignee: Seagate Technology LLC
    Inventors: Tong Zhao, Martin G. Forrester, Florin Zavaliche, Dierk Guenter Bolten, Andreas Karl Roelofs
  • Publication number: 20090086613
    Abstract: An apparatus that provides for non-destructive readback of a ferroelectric material. The apparatus can include a ferroelectric layer with a scannable surface wherein the ferroelectric layer has a compensation charge adjacent the scannable surface. The apparatus also can include an electrode adjacent the scannable surface to sense the compensation charge. A related method is also disclosed.
    Type: Application
    Filed: October 2, 2007
    Publication date: April 2, 2009
    Applicant: Seagate Technology LLC
    Inventors: Tong Zhao, Martin G. Forrester, Florin Zavaliche, Dierk Guenter Bolten, Andreas Karl Roelofs
  • Patent number: 5793056
    Abstract: A technique for defining the active area of a high-T.sub.c superconductor Josephson junction uses an epitaxial slotted insulator patterned over the edge of the superconductor thin film-insulator bilayer. The superconductor/normal-metal/superconductor edge junction formed between the slotted insulator has a small active area. The counter electrode provided as an interconnect of the junction can therefore be wider than the active area of the edge junction since it can overlap onto the patterned slotted insulator. The use of the slotted insulator enables fabrication of junctions having resistances and critical currents in the desired range for high-T.sub.c superconductor circuits while enabling the use of wide, low inductance interconnects.
    Type: Grant
    Filed: February 21, 1997
    Date of Patent: August 11, 1998
    Assignee: Northrop Grumman Corporation
    Inventors: Martin G. Forrester, Brian D. Hunt
  • Patent number: 5532485
    Abstract: An array of superconductive quantum detectors (SQD) with current biased SQUID flowing in one direction from fifty percent of the detectors and flowing in the opposite direction for the other fifty percent. The SQD in one embodiment has a serpentine pattern loop and minimal cross-sectional area to increase kinetic induction. A directly connected SQUID is within the loop of one embodiment and exterior of the loop in another embodiment. Methods of optimizing the signal of the array and different types of Josephson Junctions are also disclosed.
    Type: Grant
    Filed: October 14, 1994
    Date of Patent: July 2, 1996
    Assignee: Northrop Grumman Corp.
    Inventors: Nathan Bluzer, Martin G. Forrester
  • Patent number: 5162294
    Abstract: A supported superconductor is made where a top layer of alkaline earth metal-copper oxide based material (10) is applied to a buffer layer (14) of La.sub.2-x Sr.sub.x CuO.sub.4, where x is a value from 0 to 0.4, all of which is supported by a bottom layer (12) of .alpha.-Al.sub.2 O.sub.3.
    Type: Grant
    Filed: February 28, 1991
    Date of Patent: November 10, 1992
    Assignee: Westinghouse Electric Corp.
    Inventors: John J. Talvacchio, Martin G. Forrester