Abstract: The present invention provides a circuit board for at least one memory component which has a housing and electrical contacts on the underside of the housing, the circuit board having a first surface and a second surface, contacts on the first surface of the circuit board which are assigned to the contacts of the at least one memory component, contact balls which connect the contacts of the at least one memory component to the assigned contacts of the circuit board, and conductor tracks having a first end and a second end, which are assigned to the contacts on the first surface of the circuit board and are connected at the first end to said contacts, the conductor tracks extending between their first end and their second end on a surface of the circuit board beyond the periphery of the housing of the at least one memory component.

Abstract: Provided, among things, is a method of decreasing intraocular pressure in an animal, including a human, comprising administering an intraocular pressure decreasing amount of a compound of the formula I: 1

Abstract: Provided, among things, is a method of treating or ameliorating an indication of the invention in an animal, including a human, comprising administering an effective amount of a compound of formula I: 1

Abstract: The invention relates to the arrangement of a plurality of memory chip housings, each having at least one memory chip arranged in the interior of the memory chip housing and having a plurality of pins, which are led out of the respective memory chip housing, on a DIMM circuit board which, on one long side, has a multipole contact rail for insertion into a base of a mother board, where the plurality of memory chip housings (2) [lacuna] arranged in two rows (6, 7) parallel to the long side (3) of the circuit board (1).

Abstract: Provided, among things, is a method of decreasing intraocular pressure in an animal, including a human, comprising administering an intraocular pressure decreasing amount of a compound of the formula IA and or IB: 1

Abstract: Provided is a method of treating or ameliorating a number of indications in an animal, including a human, comprising administering an effective amount of a compound of the formula I or IA, 1

Abstract: Provided is a method of treating or ameliorating certain fibrotic diseases or other indications in an animal, including a human, comprising administering an effective amount of a compound of the formula I:

Abstract: Provided, among other things, is a method of treating or ameliorating or preventing an indication of the invention in an animal, including a human comprising administering an effective amount of a compound of the formula I: 1

Abstract: Provided is a method of treating or ameliorating or preventing glaucoma, decreasing intraocular pressure or improving or amemliorting ocular accommodation in an animal, including a human comprising administering an intraocular pressure decreasing or accommodation improving amount of a compound of the formula I: 1

Abstract: Provided, among other things, is a method of decreasing intraocular pressure or improving ocular accommodation in an animal, including a human, comprising administering an intraocular pressure decreasing or ocular accommodation improving amount of a compound of the formula I:

Abstract: Provided is a method of treating, ameliorating or preventing certain fibrotic diseases or other indications in an animal, including a human, comprising administering an intraocular pressure decreasing or accommodation improving amount of (A) a compound of formula (I):

Abstract: The invention relates to a voltage supply arrangement for a semiconductor memory with a bus system (2) which is terminated on one side, wherein a terminating voltage supply (Vttn) and a terminating resistor (Rtermn) are integrated into a DRAM (Dn).

Abstract: Provided is a method of decreasing intraocular pressure or improving ocular accommodation in an animal, including a human, comprising administering an intraocular pressure decreasing amount or ocular accommodation improving amount of a compound of the formula I or IA, 1

Abstract: In a process for drying microporous, fluid-containing particles, the heat required for increasing the temperature is supplied by convection by reducing the interfacial tension of the fluid, preferably to 0 to 1/10, in particular to 0 to 1/20, of the interfacial tension of the fluid at room temperature, by appropriately increasing the temperature at from close to the critical pressure to supercritical pressure of the fluid. Furthermore, microporous, three-dimensionally networked particles are prepared by a process in which the drying process is used. In addition, an apparatus is used for carrying out the drying process, the apparatus comprising a pressure container having an inner container and pressure-withstanding outer container and suitable measuring and control apparatuses and pump apparatuses and heat exchangers, the inner container being provided for holding the particles to be dried and a gap being provided between the inner container and the outer container.

Abstract: Provided, among other things, is a method of treating, ameliorating or preventing certain fibrotic diseases or other indications in an animal, including a human, comprising administering an effective amount of a compound of the formula I:

Abstract: A method for masking DQ bits that are input into a semiconductor memory by a memory controller is described. In this case, the bits to be masked are provided with an increased level and therefore cannot be read into the semiconductor memory due to the increased voltage level which functions as a deactivating voltage level.

Abstract: Provided, among other things, is a method of treating or ameliorating or preventing an indication of the invention in an animal, including a human comprising administering an effective amount of a compound of the formula I: 1

Abstract: A memory cell, which includes a transistor and a capacitor, for use in a DRAM uses a silicon-filled vertical trench as the capacitor and a vertical transistor superposed over the vertical trench in a silicon chip. An epitaxial layer is formed at the top of the fill in the trench to impart seed information to the primarily polysilicon silicon fill in the trench. A polysilicon layer is deposited over the top surface of the chip, is apertured over the top of the trench, and has its sidewalls oxidized. The opening is then refilled with epitaxial silicon in which there is created in operation an inversion layer that serves as the channel of the transistor, and the deposited polysilicon layer serves as the word line. Another silicon layer is deposited over the epitaxial layer to serve as the bit line. The source/drain regions of the transistor are formed at the merger of the deposited layer with the fill in the trench and the merger with the polysilicon layer that serves as the bit line.

Abstract: A method for fabricating a bit line junction in a DRAM array device which improves the doping profile in the channel region. The method includes contradoping via ion implantation through the bit line contact opening made in the device during processing. This particular doping method increases the concentration of dopants in the channel region on the bit line side of the array, without a corresponding increase of dopants on the buried strap side. Such a doping profile results in an improvement in the off current behavior of the device. Depending on the aspect ratio of the contact opening, tilt angles for the ion implantation are possible and can be adjusted for maximum off current efficiency.

Abstract: A test structure and a method for detecting early failures in a large ensemble of semiconductor elements, particularly applicable to on-chip interconnects, is provided. A novel approach to gain information about the statistical behavior of several thousand interconnects and to investigate possible deviations from perfect lognormal statistics is presented. A test structure having a Wheatstone Bridge arrangement and arrays of several hundred interconnects may be used to prove that failure data does not deviate from lognormal behavior down to a cumulative failure rate of approximately one out of 20,000. Typical test structure sizes may, therefore, be extended far beyond standard test procedures to gain information about the statistical behavior of failure mechanisms and to verify the validity of the assumption that failure mechanisms follow lognormal statistical behavior.