Abstract: A method for converting multi-bit digital video data signals to analogue form wherein the video data signals are in three formats, namely, standard definition, progressive scan and high definition formats, which permits a relatively low order analogue reconstruction filter to be used for filtering the analogue form of the signal. The three formats of the digital video data signals are over-sampled at relatively low over-sampling rates, the standard definition video signals being over-sampled at eight times the nyquist sampling frequency, the progressive scan format signals being over-sampled at four times the nyquist sampling frequency, while the high definition format signals are over-sampled at twice the nyquist sampling frequency.

Abstract: A method for selectively and sequentially converting digital video data signals in three formats, namely, standard definition, progressive scan and high definition formats to analogue form such that the same analogue reconstruction filter can be used for filtering the analogue forms of the signals after conversion. The digital signals prior to being converted are over-sampled at respective over-sampling frequencies for displacing image frequencies to frequencies sufficiently spaced apart from the widest band width signal so that the analogue reconstruction filter can be provided for filtering the widest band width signal as well as the other band width signals and also can be provided with a relatively low roll-off rate of attenuation.

Abstract: A method for converting multi-bit digital video data signals to analogue form wherein the video data signals are in three formats, namely, standard definition, progressive scan and high definition formats, which permits a relatively low order analogue reconstruction filter to be used for filtering the analogue form of the signal. The three formats of the digital video data signals are over-sampled at relatively low over-sampling rates, the standard definition video signals being over-sampled at eight times the nyquist sampling frequency, the progressive scan format signals being over-sampled at four times the nyquist sampling frequency, while the high definition format signals are over-sampled at twice the nyquist sampling frequency.

Abstract: A method for selectively and sequentially converting digital video data signals in three formats, namely, standard definition, progressive scan and high definition formats to analogue form such that the same analogue reconstruction filter can be used for filtering the analogue forms of the signals after conversion. The digital signals prior to being converted are over-sampled at respective over-sampling frequencies for displacing image frequencies to frequencies sufficiently spaced apart from the widest band width signal so that the analogue reconstruction filter can be provided for filtering the widest band width signal as well as the other band width signals and also can be provided with a relatively low roll-off rate of attenuation.

Abstract: An extended range of frequency synthesiser responsive to a number of different input frequencies to provide multiples of those input frequencies as its final outputs includes a phase locked loop having an output frequency range containing a multiple of each of the final output frequencies; and a pre-divider circuit for dividing the input frequencies by a first predetermined number before submission to said phase locked loop and a post divider circuit for dividing the phase locked loop output by a second predetermined number to obtain the final output while operating the phase locked loop in the output frequency range.

Abstract: A switch architecture for a digital-to-analog converter provides improved linearity. A first switch for one leg of the R/2R resistance ladder includes a unit resistor coupled between the MOSFET devices of the switch and the respective leg of the R/2R ladder. The on resistances of the MOSFET devices of the first switch are controlled in response to a reference value, such as the resistance of a reference resistor, which may have a resistance and other characteristics similar to the unit resistor. Other switches for other legs of the R/2R ladder also have a unit resistor, or other MOSFET devices having an on resistance controlled in relation to the reference value. Additional switches for other legs of the R/2R ladder may also have MOSFET devices of varying width to channel (W/L) ratios. Each of these approaches may be combined to achieve a binary weighting or an alternate weighting between legs of the R/2R ladder, in order to provide low linearity error.