Abstract: A rack power distribution unit is provided having one or more outlet modules. Each outlet module includes a body having a plurality of outlet openings. A plurality of outlets are configured to be inserted into, and retained within, the plurality of outlet openings. An outlet board is configured to be coupled to, and distribute power to, the plurality of outlets. A control board configured to be coupled to, and distribute power to, the outlet board, where the outlet board is configured to be coupled to a first outlet of a first type and a second outlet of a second type.

Abstract: A rack power distribution unit is provided having one or more outlet modules. Each outlet module includes a body having a plurality of outlet openings. A plurality of outlets are configured to be inserted into, and retained within, the plurality of outlet openings. An outlet board is configured to be coupled to, and distribute power to, the plurality of outlets. A control board configured to be coupled to, and distribute power to, the outlet board, where the outlet board is configured to be coupled to a first outlet of a first type and a second outlet of a second type.

Abstract: A method of an aspect is performed by a processor. The method includes receiving a partial width load instruction. The partial width load instruction indicates a memory location of a memory as a source operand and indicates a register as a destination operand. The method includes loading data from the indicated memory location to the processor in response to the partial width load instruction. The method includes writing at least a portion of the loaded data to a partial width of the register in response to the partial width load instruction. The method includes finishing writing the register with a set of bits stored in a remaining width of the register that have bit values that depend on a partial width load mode of the processor. The partial width load instruction does not indicate the partial width load mode. Other methods, processors, and systems are also disclosed.

Abstract: A processor is operable to process conditional branches. The processor includes instruction fetch logic to fetch a conditional short forward branch. The conditional short forward branch is to include a conditional branch instruction and a set of one or more instructions that are to sequentially follow the conditional branch instruction in program order. The set of the one or more instructions are between the conditional branch instruction and a forward branch target instruction that is to be indicated by the conditional branch instruction. The processor also includes instruction conversion logic coupled with the instruction fetch logic. The instruction conversion logic is to convert the conditional short forward branch to a computationally equivalent set of one or more predicated instructions. Other processors are also disclosed, as are various methods and systems.

Abstract: A processor of an aspect includes an instruction fetch unit to fetch a pair of instruction order enforcement instructions. The pair of instruction order enforcement instructions are part of an instruction set of the processor. The pair of instruction order enforcement instructions includes an activation instruction and an enforcement instruction. The activation instruction is to occur before the enforcement instruction in a program order. The processor also includes an instruction order enforcement module. The instruction order enforcement module, in response to the pair of the instruction order enforcement instructions, is to prevent instructions occurring after the enforcement instruction in the program order, from being processed prior to the activation instruction, in an out-of-order portion of the processor. Other processors are also disclosed, as are various methods, systems, and instructions.

Abstract: A processor of an aspect includes an instruction fetch unit to fetch a pair of instruction order enforcement instructions. The pair of instruction order enforcement instructions are part of an instruction set of the processor. The pair of instruction order enforcement instructions includes an activation instruction and an enforcement instruction. The activation instruction is to occur before the enforcement instruction in a program order. The processor also includes an instruction order enforcement module. The instruction order enforcement module, in response to the pair of the instruction order enforcement instructions, is to prevent instructions occurring after the enforcement instruction in the program order, from being processed prior to the activation instruction, in an out-of-order portion of the processor. Other processors are also disclosed, as are various methods, systems, and instructions.

Abstract: A method of an aspect is performed by a processor. The method includes receiving a partial width load instruction. The partial width load instruction indicates a memory location of a memory as a source operand and indicates a register as a destination operand. The method includes loading data from the indicated memory location to the processor in response to the partial width load instruction. The method includes writing at least a portion of the loaded data to a partial width of the register in response to the partial width load instruction. The method includes finishing writing the register with a set of bits stored in a remaining width of the register that have bit values that depend on a partial width load mode of the processor. The partial width load instruction does not indicate the partial width load mode. Other methods, processors, and systems are also disclosed.

Abstract: A set of default registers of a processor are expanded into metadata registers on the processor of a computer system. The default registers having stored thereon data, while metadata which is related to the data is stored separately on the metadata registers.

Abstract: A set of default registers of a processor are expanded into metadata registers on the processor of a computer system. The default registers having stored thereon data, while metadata which is related to the data is stored separately on the metadata registers.

Abstract: A narrow linewidth semiconductor laser device has a semiconductor laser and a low noise current source operatively connected to the laser with the current source being adapted to prevent degradation of the laser's frequency noise spectrum. An optical frequency discriminator provides an error signal representative of the laser's optical frequency and a control circuit has a feedback network that provides a frequency feedback signal that is adapted to the frequency noise spectrum of the frequency discriminator and to the laser's frequency noise spectrum and tuning response. The control circuit also has a sequencer to automatically enable frequency locking of the laser on the frequency reference of the optical frequency discriminator. An enclosure encloses the frequency discriminator to isolate the frequency discriminator from external perturbations.

Abstract: There is provided a narrow linewidth semiconductor laser device comprising a semiconductor laser and a low noise current source operatively connected to the laser for supplying current thereto, the current source being particularly adapted to prevent a significant degradation of the frequency noise spectrum of the laser. The laser device also has an optical frequency discriminator providing an error signal representative of the optical frequency of the laser. The laser device also has control means having a feedback network for providing a frequency feedback signal. The feedback network is particularly adapted to the frequency noise spectrum of the frequency discriminator, the frequency noise spectrum of the laser and the tuning response of the laser. The control means is also provided with sequencing means for allowing to automatically enable frequency locking of the laser on the frequency reference of the optical frequency discriminator.

Abstract: An LED, and in particular an LED employing emissive semi-conductors such as conjugated polymeric materials, consists of a pair of electrodes, one or more intermediate semi-conductor layers arranged therebetween and optionally one or more futher layers, and incorporates a microstructured feature adapted to manipulate spontaneous emission or propagation of light. The invention also consists of a method for the production of such an LED and the use of such a LED as an light emitting display.

Abstract: An athermally packaged optical fiber device, such as a Bragg grating, is provided. The device includes a hollow structure, and a free and a threaded member projecting in the hollow structure from both ends. The optical fiber is mounted in tension inside the hollow structure through longitudinal fiber-receiving bores in both members, and has an anchor point affixed to each member with the grating therebetween. The anchor point of the threaded member is provided outside of the hollow structure, making the device more compact. The free and threaded members are rotatable together to adjust the resonant wavelength of the grating, and a nut may be provided to allow a fine-tuning. The hollow structure, free member and threaded member have a coefficient of thermal expansion selected so that they together compensate for the temperature dependency of the Bragg wavelength.

Abstract: The invention is the novel use of dispersion compensation in a long haul wavelength division multiplexed high capacity optical transport system which has very many channels packed extremely closely together, in order to greatly reduce the deleterious effects of four-wave mixing. Four-wave mixing is an exchange of energy between nominally independent channels, arising from the fundamental fibre non-linearity, which has the effect of degrading transmission quality. Conventional systems make use of fibre dispersion compensating modules to overcome the effects of fibre dispersion. In such systems, it has been discovered that the exact distribution of fibre dispersion along the optical link (the ‘dispersion map’) strongly influences the degree of four-wave mixing, and hence the degradation in transmission quality.

Abstract: An athermally packaged optical fiber device, such as a Bragg grating, is provided. The device includes a hollow structure, and a free and a threaded member projecting in the hollow structure from both ends. The optical fiber is mounted in tension inside the hollow structure through longitudinal fiber-receiving bores in both members, and has an anchor point affixed to each member with the grating therebetween. The anchor point of the threaded member is provided outside of the hollow structure, making the device more compact. The free and threaded members are rotatable together to adjust the resonant wavelength of the grating, and a nut may be provided to allow a fine-tuning. The hollow structure, free member and threaded member have a coefficient of thermal expansion selected so that they together compensate for the temperature dependency of the Bragg wavelength.

Abstract: A method and an apparatus to photoinduce a grating or other type of modulated refractive index change in a photosensitive optical medium such as optical fiber. The resulting grating has a variable and controllable intensity profile and average value of the index change. The modulated refractive index change is photoimprinted in the medium in a series of writing steps, each comprising exposing a segment of the medium to a writing beam for a predetermined exposure time. To change the modulation intensity from step to step, the angle of incidence of the writing beam is dithered for an appropriate fraction of the exposure time at each step. This allows to control the amount of incident light on the medium for each step. If the exposure time is the same for each writing step, the average value of the index change may be kept constant avoiding undesired structure in the grating frequency response.

Abstract: The amplifier is a two-stage amplifier in which dispersion compensation and WDM channel equalization are carried out using a plurality of in-waveguide Bragg gratings placed between the two stages. The first stage has a gain able to raise the intensity of WDM optical communications signals to a high enough level that after dispersion compensation and equalization, the signals fed into the second stage nearly or substantially saturate the second stage amplifier. The noise figure signal-to-noise ratio is thereby of good quality since there are no significant losses at the signal input of the signal into the optical amplifier. Erbium-doped optically pumped fiber amplifiers are used for the two stages. An add/drop filter can be appended to the end of the conditioning Bragg gratings. Residual optical signal from the fiber Bragg grating may be used to optically pump another amplifier for amplifying longer wavelength optical signals.