Patents by Inventor Martin H. Francis

Martin H. Francis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6173374
    Abstract: The present invention retrieves data across independent computer nodes of a server cluster by providing for I/O shipping of block level requests to peer intelligent host-bus adapters (hereinafter referred to as HBA). This peer-to-peer distribution of block I/O requests is transparent to the host. The HBA has the intelligence to decide whether to satisfy a block I/O request locally or remotely. Each HBA driver utilizes the I2O protocol, which allows peer-to-peer communication independent of the operating system or hardware of the underlying network. In a first embodiment of the present invention, local and remote storage channels, within a node, are supported by a single HBA. In a second embodiment of the present invention, local storage channels, within a node, are supported by one HBA, and the remote storage channel, within a node, is supported by a separate HBA.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: January 9, 2001
    Assignee: LSI Logic Corporation
    Inventors: Thomas F. Heil, Martin H. Francis, Rodney A. DeKoning, Bret S. Weber
  • Patent number: 4193539
    Abstract: A timing generator which may be used for multiple-cycle controllers is disclosed. A Johnson counter which may have a selectively operable delay interposed between successive stages is utilized with an oscillator and a plurality of multiplexers to provide a plurality of timing pulse train cycles. Circuitry is provided to eliminate spurious output signals from the timing generator.
    Type: Grant
    Filed: November 7, 1977
    Date of Patent: March 18, 1980
    Assignee: NCR Corporation
    Inventors: Rodney V. Bowman, Martin H. Francis
  • Patent number: 4130899
    Abstract: A system including first drivers (such as TTL drivers) operatively connected to the control lines of a volatile memory for providing control and refresh functions to the memory in a normal mode, and second drivers (such as CMOS drivers) operatively connected to the control lines for providing refresh functions to the memory in a standby mode. First and second power sources are provided for providing first and second voltage levels to the first and second drivers, respectively. A diode is connected between the first and second power sources to maintain the first and second voltage levels at a predetermined differential from each other in the event that the second power source fails to prevent damage to the second drivers (CMOS) through reverse biasing.
    Type: Grant
    Filed: November 25, 1977
    Date of Patent: December 19, 1978
    Assignee: NCR Corporation
    Inventors: Rodney V. Bowman, Martin H. Francis