Patents by Inventor Martin Jeffrey Binns
Martin Jeffrey Binns has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10060045Abstract: A method of growing a monocrystalline silicon ingot is described. The method includes the steps of providing a monocrystalline ingot growing apparatus including a chamber having an internal pressure, and a crucible disposed within the chamber, preparing a silicon melt in the crucible, introducing an inert gas into the chamber from a gas inlet above the silicon melt, wherein the inert gas flows over the surface of the silicon melt and has a flow rate, introducing a volatile dopant including indium into the silicon melt, growing an indium-doped monocrystalline silicon ingot, and controlling the indium dopant concentration in the ingot by adjusting the ratio of the inert gas flow rate and the internal pressure of the chamber.Type: GrantFiled: December 27, 2013Date of Patent: August 28, 2018Assignee: Corner Star LimitedInventors: Roberto Scala, Luigi Bonanno, Stephan Haringer, Armando Giannattasio, Valentino Moser, Jesse Samsonov Appel, Martin Jeffrey Binns
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Publication number: 20160215413Abstract: A method of growing a monocrystalline silicon ingot is described. The method includes the steps of providing a monocrystalline ingot growing apparatus including a chamber having an internal pressure, and a crucible disposed within the chamber, preparing a silicon melt in the crucible, introducing an inert gas into the chamber from a gas inlet above the silicon melt, wherein the inert gas flows over the surface of the silicon melt and has a flow rate, introducing a volatile dopant including indium into the silicon melt, growing an indium-doped monocrystalline silicon ingot, and controlling the indium dopant concentration in the ingot by adjusting the ratio of the inert gas flow rate and the internal pressure of the chamber.Type: ApplicationFiled: December 27, 2013Publication date: July 28, 2016Inventors: Roberto Scala, Luigi Bonanno, Stephan Haringer, Armando Giannattasio, Valentino Moser, Jesse Samsonov Appel, Martin Jeffrey Binns
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Publication number: 20150333193Abstract: A solar cell is provided, the solar cell fabricated from an indium-doped monocrystalline silicon wafer sliced from an ingot grown by the Czochralski method. The solar cell is characterized by high efficiency and low light induced degradation.Type: ApplicationFiled: December 27, 2013Publication date: November 19, 2015Inventors: Jesse Samsonov Appel, Martin Jeffrey Binns, Roberto Scala, Luigi Bonanno, Stephan Haringer, Armando Giannattasio, Valentino Moser
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Patent number: 6897084Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer having an interstitial oxygen content which renders it incapable of forming thermal donors in an amount sufficient to affect resistivity upon being subjected to a conventional semiconductor device manufacturing process. The present invention further directed to a silicon on insulator structure derived from such a wafer.Type: GrantFiled: April 11, 2002Date of Patent: May 24, 2005Assignee: MEMC Electronic Materials, Inc.Inventors: Martin Jeffrey Binns, Robert J. Falster, Jeffrey L. Libbert
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Patent number: 6743289Abstract: A thermal annealing process for producing a low defect density single crystal silicon wafer. The process includes thermally annealing a wafer having a first axially symmetric region which extends radially inwardly from the circumferential edge, contains silicon self-interstitials as the predominant intrinsic point defect and is substantially free of agglomerated interstitial defects and a second axially symmetric region which has vacancies as the predominant intrinsic point defect. The wafer is subjected to a thermal anneal at a temperature in excess of about 1000° C. in an atmosphere of hydrogen, argon or a mixture thereof to dissolve agglomerated vacancy defects present in the second axially symmetric region within a layer extending from the front side toward the central plane.Type: GrantFiled: February 11, 2002Date of Patent: June 1, 2004Assignee: MEMC Electronic Materials, Inc.Inventors: Robert J. Falster, Martin Jeffrey Binns, Alan Wang
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Patent number: 6686260Abstract: A process for heat-treating a single crystal silicon wafer to dissolve agglomerated vacancy defects and to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The process includes subjecting the wafer to a heat treatment to dissolve agglomerated vacancy defects, rapid thermally annealing the heat-treated wafer to cause the formation of crystal lattice vacancies throughout the wafer and controlling the cooling rate of the annealed wafer to allow some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a nonuniform vacancy concentration with the concentration of vacancies in the bulk of the wafer being greater than the concentration in the surface layer.Type: GrantFiled: February 4, 2002Date of Patent: February 3, 2004Assignee: MEMC Electronics Materials, Inc.Inventors: Robert J. Falster, Martin Jeffrey Binns, Harold W. Korb
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Publication number: 20030192469Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has a non-uniform distribution of crystal lattice vacancies therein, the peak concentration being present in the wafer bulk between an imaginary central plane and a surface of the wafer, such that, upon being subjected to the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, the wafer forms oxygen precipitates in the wafer bulk and a thin or shallow precipitate-free zone near the wafer surface.Type: ApplicationFiled: October 22, 2002Publication date: October 16, 2003Applicant: MEMC Electronic Materials, Inc.Inventors: Jeffrey L. Libbert, Martin Jeffrey Binns, Robert J. Falster
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Publication number: 20030054641Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer having an interstitial oxygen content which renders it incapable of forming thermal donors in an amount sufficient to affect resistivity upon being subjected to a conventional semiconductor device manufacturing process. The present invention further directed to a silicon on insulator structure derived from such a wafer.Type: ApplicationFiled: April 11, 2002Publication date: March 20, 2003Applicant: MEMC Electronic Materials, Inc.Inventors: Martin Jeffrey Binns, Robert J. Falster, Jeffrey L. Libbert
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Publication number: 20020170631Abstract: A process for heat-treating a single crystal silicon wafer to dissolve agglomerated vacancy defects and to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step is disclosed. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a thermal anneal to dissolve agglomerated vacancy defects present in a stratum extending from the front surface toward the center of the wafer. The annealed wafer is then heat-treated to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon.Type: ApplicationFiled: February 4, 2002Publication date: November 21, 2002Applicant: MEMC Electronic Materials, Inc.Inventors: Robert J. Falster, Martin Jeffrey Binns, Harold W. Korb
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Patent number: 6416836Abstract: A single crystal silicon wafer having a central axis, a front side and a back side which are generally perpendicular to the central axis, a central plane between the front and back sides, a circumferential edge, and a radius extending from the central axis to the circumferential edge. The wafer comprises first and second axially symmetric regions. The first axially symmetric region extends radially inwardly from the circumferential edge, contains silicon self-interstitials as the predominant intrinsic point defect, and is substantially free of agglomerated interstitial defects. The second axially symmetric region has vacancies as the predominant intrinsic point defect, comprises a surface layer extending from the front side toward the central plane and a bulk layer extending from the surface layer to the central plane, wherein the number density of agglomerated vacancy defects present in the surface layer is less than the concentration in the bulk layer.Type: GrantFiled: October 13, 1999Date of Patent: July 9, 2002Assignee: MEMC Electronic Materials, Inc.Inventors: Robert J. Falster, Martin Jeffrey Binns, Alan Wang
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Publication number: 20020083889Abstract: A single crystal silicon wafer having a central axis, a front side and a back side which are generally perpendicular to the central axis, a central plane between the front and back sides, a circumferential edge, and a radius extending from the central axis to the circumferential edge. The wafer comprises first and second axially symmetric regions. The first axially symmetric region extends radially inwardly from the circumferential edge, contains silicon self-interstitials as the predominant intrinsic point defect, and is substantially free of agglomerated interstitial defects. The second axially symmetric region has vacancies as the predominant intrinsic point defect, comprises a surface layer extending from the front side toward the central plane and a bulk layer extending from the surface layer to the central plane, wherein the number density of agglomerated vacancy defects present in the surface layer is less than the concentration in the bulk layer.Type: ApplicationFiled: February 11, 2002Publication date: July 4, 2002Applicant: MEMC Electronic Materials, Inc.Inventors: Robert J. Falster, Martin Jeffrey Binns, Alan Wang
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Patent number: 6361619Abstract: A process for heat-treating a single crystal silicon wafer to dissolve agglomerated vacancy defects and to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step is disclosed. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a thermal anneal to dissolve agglomerated vacancy defects present in a stratum extending from the front surface toward the center of the wafer. The annealed wafer is then heat-treated to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon.Type: GrantFiled: August 27, 1999Date of Patent: March 26, 2002Assignee: MEMC Electronic Materials, Inc.Inventors: Robert J. Falster, Martin Jeffrey Binns, Harold W. Korb