Patents by Inventor Martin Kalfus
Martin Kalfus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5535510Abstract: An encapsulated microelectronic device (100) including a base (101) and a semiconductor device (305) having a top and a bottom. The bottom is attached to the base (101). The semiconductor device (105) has a thickness in the range from one-fourth to three-fourths of a millimeter and has a bottom metallization consisting of aluminum (407)/chromium (405)/nickel (403)/gold (401). The semiconductor device (305) has a contact (115) attached to the top. The encapsulated microelectronic device (100) has a molded top (120) surrounding the semiconductor device (305). The molded top (120) is made from low stress molding material.Type: GrantFiled: June 2, 1995Date of Patent: July 16, 1996Assignee: Motorola Inc.Inventors: Samuel J. Anderson, John Baird, Martin A. Kalfus
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Patent number: 5523629Abstract: An encapsulated microelectronic device (100 ) including a base (101) and a semiconductor device (305) having a top and a bottom. The bottom is attached to the base (101). The semiconductor device (105) has a thickness in the range from one-fourth to three-fourths of a millimeter and has a bottom metallization consisting of aluminum (407)/chromium (405)/nickel (403)/gold (401). The semiconductor device (305) has a contact (115) attached to the top. The encapsulated microelectronic device (100) has a molded top (120) surrounding the semiconductor device (305 ). The molded top (120) is made from low stress molding material.Type: GrantFiled: July 21, 1994Date of Patent: June 4, 1996Assignee: Motorola, Inc.Inventors: Samuel J. Anderson, John Baird, Martin A. Kalfus
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Patent number: 5378928Abstract: An encapsulated microelectronic device (100) including a base (101) and a semiconductor device (305) having a top and a bottom. The bottom is attached to the base (101). The semiconductor device (105) has a thickness in the range from one-fourth to three-fourths of a millimeter and has a bottom metallization consisting of aluminum (407)/chromium (405)/nickel (403)/gold (401). The semiconductor device (305) has a contact (115) attached to the top. The encapsulated microelectronic device (100) has a molded top (120) surrounding the semiconductor device (305). The molded top (120) is made from low stress molding material.Type: GrantFiled: April 27, 1993Date of Patent: January 3, 1995Assignee: Motorola, Inc.Inventors: Samuel J. Anderson, John Baird, Martin A. Kalfus
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Patent number: 5110761Abstract: An improved contact is obtained to power devices having a raised dielectric region adjacent the die contact region by providing a contact dimple on the otherwise flat metal lead used for die contact. The dimple is arranged above the die contact and soldered thereto. The radius of curvature and depth of the dimple is adjusted so that the contact lead is far enough away from the edge of the surrounding raised dielectric at the edge of the die contact to provide a laterally concave outward air-solder interface in that location. This prevents solder creep onto the dielectric surface and avoids die edge shorting. Several dimple shapes are described.Type: GrantFiled: February 12, 1990Date of Patent: May 5, 1992Assignee: Motorola, Inc.Inventors: Martin Kalfus, Eugene L. Foutz
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Patent number: 5001545Abstract: An improved contact is obtained to power devices having a raised dielectric region adjacent the die contact region by providing a contact dimple on the otherwise flat metal lead used for die contact. The dimple is arranged above the die contact and soldered thereto. The radius of curvature and depth of the dimple is adjusted so that the contact lead is far enough away from the edge of the surrounding raised dielectric at the edge of the die contact to provide a laterally concave outwardly air-solder interface in that location. This prevents solder creep onto the dielectric surface and avoids die edge shorting. Several dimple shapes are described.Type: GrantFiled: September 9, 1988Date of Patent: March 19, 1991Assignee: Motorola, Inc.Inventors: Martin Kalfus, Eugene L. Foutz
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Patent number: 4994412Abstract: An improved means and method for forming leads to a power device is provided by use of a one-piece leadframe on which the die is mounted and a separate connecting clip between the leadframe and the bonding pad on the semiconductor die. The leadframe has an alignment dimple or groove for receiving a mating alignment feature on one end of the connecting clip. The other end of the connecting clip is located over the bonding pad on the die. Solder is placed between die and the leadframe and between the connecting clip and the bonding pad and between the mating alignment surfaces on the clip and leadframe. When the solder is liquid during assembly the die and clip float thereon and automatically align by surface tension so that the die is centrally located on the die flag, the connection point on the clip is centered on the bonding pad and the mating alignment surfaces on the clip and leadframe are engaged.Type: GrantFiled: February 9, 1990Date of Patent: February 19, 1991Assignee: Motorola Inc.Inventors: Martin Kalfus, Robert A. Gooch
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Patent number: 4935803Abstract: An improved means and method for forming leads to a power device is provided by use of a one-piece leadframe on which the die is mounted and a separate connecting clip between the leadframe and the bonding pad on the semiconductor die. The leadframe has an alignment dimple or groove for receiving a mating alignment feature on one end of the connecting clip. The other end of the connecting clip is located over the bonding pad on the die. Solder is placed between die and the leadframe and between the connecting clip and the bonding pad and between the mating alignment surfaces on the clip and leadframe. When the solder is liquid during assembly the die and clip float thereon and automatically align by surface tension so that the die is centrally located on the die flag, the connection point on the clup is centered on the bonding pad and the mating alignment surfaces on the clip and leadframe are engaged.Type: GrantFiled: September 9, 1988Date of Patent: June 19, 1990Assignee: Motorola, Inc.Inventors: Martin Kalfus, Robert A. Gooch
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Patent number: 4783428Abstract: A method is described for coupling the leadframe of a thermogenetic semiconductor device to a heatsink. This method consists of screening a first layer of thermally conductive epoxy on the heatsink. The first layer is cured and a second layer is screened on the first layer. The leadframe is then deposited on the second layer and the second layer is cured. The device then goes to encapsulation and final processing.Type: GrantFiled: November 23, 1987Date of Patent: November 8, 1988Assignee: Motorola Inc.Inventor: Martin A. Kalfus
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Patent number: 4568962Abstract: A means and method is provided for forming power devices using multiple semiconductor die. Typically, several semiconductor die or die assemblies with contact disks are mounted on a base plate in a spaced apart relationship. A compliant connector member which supports a massive power terminal, bridges between the die to which it is bonded via crushable contact dimples, to form an assembly. The assembly deforms during insertion into the mold to accommodate thickness variations and seat the outward faces of the terminal and base plate against the matching mold faces. When the plastic molding compound is injected into the mold there is a net outward force which seals the outward terminal, base and corresponding mold faces together to prevent encroachment of the plastic therebetween.Type: GrantFiled: November 8, 1982Date of Patent: February 4, 1986Assignee: Motorola, Inc.Inventor: Martin A. Kalfus