Abstract: A system is disclosed for controlling operation of a motor-driven brake boost assist system of a vehicle braking system during a loss of battery power to the brake boost assist system. The system makes use of a brake boost assist system including a motor, an electronic control unit (ECU) for controlling operation of the brake boost assist system, and a detection system. The detection system is responsive to a transition edge of a VBATTERY signal powering the motor. The detection system is configured to generate a wakeup pulse in response to detecting the transition edge. The wakeup pulse is applied to the ECU to wake up the ECU in the event of a momentary power loss to the ECU.

Abstract: A system is disclosed for controlling operation of a motor-driven brake boost assist system of a vehicle braking system during a loss of battery power to the brake boost assist system. The system makes use of a brake boost assist system including a motor, an electronic control unit (ECU) for controlling operation of the brake boost assist system, and a detection system. The detection system is responsive to a transition edge of a VBATTERY signal powering the motor. The detection system is configured to generate a wakeup pulse in response to detecting the transition edge. The wakeup pulse is applied to the ECU to wake up the ECU in the event of a momentary power loss to the ECU.

Abstract: A system is disclosed for controlling operation of a motor-driven brake boost assist system of a vehicle braking system during a loss of battery power to the brake boost assist system. The system makes use of a brake boost assist system including a motor, an electronic control unit (ECU) for controlling operation of the brake boost assist system, and a detection system. The detection system is responsive to a transition edge of a VBATTERY signal powering the motor. The detection system is configured to generate a wakeup pulse in response to detecting the transition edge. The wakeup pulse is applied to the ECU to wake up the ECU in the event of a momentary power loss to the ECU.

Abstract: A microprocessor reset control operates in one of two reset states and transitions from the first state to the second state when a first signal falls below a first threshold and from the second state to the first state when a second signal exceeds a second threshold.

Abstract: Transient voltages are not propagated through a P-channel MOSFET used as a switch with output slew rate control feedback, by connecting a low or near-zero impedance across the source and gate terminals of the device whenever the MOSFET is supposed to be off. The low or near-zero impedance is provided by a second P-channel MOSFET connected across the source and gate of the MOSFET switch.

Abstract: Transient voltages are not propagated through a P-channel MOSFET used as a switch with output slew rate control feedback, by connecting a low or near-zero impedance across the source and gate terminals of the device whenever the MOSFET is supposed to be off. The low or near-zero impedance is provided by a second P-channel MOSFET connected across the source and gate of the MOSFET switch.

Abstract: A semiconductor device may be protected from over-voltages via a comparator-controlled, high-current FET coupled to the semiconductor device output and between circuit devices that carry high voltages. A three-terminal, N-channel field effect transistor (FET) may have its source coupled to the output of the semiconductor device to be protected from over voltage. The FET drain may be connected to the load to be driven by the semiconductor device. A transistor, or other voltage comparator, may be configured and connected in order to compare the voltage on the FET drain to a Vmax reference voltage. When a voltage on the FET drain exceeds Vmax, the comparator output may shut down the FET, thereby isolating the semiconductor device, which is connected to the FET source, from the overvoltage on the FET drain.

Abstract: A system and method for controlling battery conditions. The system includes a network access device battery. The network access device battery powers a network access device. A heating element may be connected to the network access device battery. The heating element may be a resistive load for determining a status of the network access device battery or the heating element may be activated based on a heating schedule.

Abstract: A semiconductor device may be protected from over-voltages via a comparator-controlled, high-current FET coupled to the semiconductor device output and between circuit devices that carry high voltages. A three-terminal, N-channel field effect transistor (FET) may have its source coupled to the output of the semiconductor device to be protected from over voltage. The FET drain may be connected to the load to be driven by the semiconductor device. A transistor, or other voltage comparator, may be configured and connected in order to compare the voltage on the FET drain to a Vmax reference voltage. When a voltage on the FET drain exceeds Vmax, the comparator output may shut down the FET, thereby isolating the semiconductor device, which is connected to the FET source, from the overvoltage on the FET drain.

Abstract: A microprocessor reset control operates in one of two reset states and transitions from the first state to the second state when a first signal falls below a first threshold and from the second state to the first state when a second signal exceeds a second threshold.

Abstract: A system and method for controlling battery conditions. The system includes a network access device battery. The network access device battery powers a network access device. A heating element may be connected to the network access device battery. The heating element may be a resistive load for determining a status of the network access device battery or the heating element may be activated based on a heating schedule.

Abstract: A system and method for testing a battery is provided. A load is connected in electrical series connection with the battery. A sensor may be in communication with the battery for measuring a battery discharge curve. A processor monitors an output of the battery and determines a battery status based on a slope of an initial portion of the battery discharge curve.