Patents by Inventor Martin Leslie White

Martin Leslie White has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240039867
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Application
    Filed: October 10, 2023
    Publication date: February 1, 2024
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Patent number: 11824796
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: November 21, 2023
    Assignee: MARVELL ASIA PTE, LTD.
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Patent number: 11700204
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: July 11, 2023
    Assignee: Marvell Asia PTE, LTD.
    Inventor: Martin Leslie White
  • Publication number: 20210336885
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Application
    Filed: July 9, 2021
    Publication date: October 28, 2021
    Inventor: Martin Leslie White
  • Patent number: 11095561
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: August 17, 2021
    Assignee: MARVELL ASIA PTE, LTD.
    Inventor: Martin Leslie White
  • Publication number: 20200374240
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Application
    Filed: August 13, 2020
    Publication date: November 26, 2020
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Patent number: 10785169
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: September 22, 2020
    Assignee: MARVELL ASIA PTE, LTD.
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Publication number: 20200092208
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 19, 2020
    Inventor: Martin Leslie White
  • Patent number: 10523567
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: December 31, 2019
    Assignee: Cavium, LLC
    Inventor: Martin Leslie White
  • Patent number: 10419571
    Abstract: A forwarding database cache system is described herein. The forwarding database cache system includes a main forwarding database and one or more forwarding database caches. When a packet is received, the cache is searched first for information such as address information, and if found, then the packet is forwarded to the appropriate destination. If the address information is not found in the cache, then the main forwarding database is searched, and the packet is forwarded to the appropriate destination based on the information in the main forwarding database.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: September 17, 2019
    Assignee: Cavium, LLC
    Inventor: Martin Leslie White
  • Publication number: 20190007323
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Application
    Filed: September 10, 2018
    Publication date: January 3, 2019
    Inventor: Martin Leslie White
  • Patent number: 10103993
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: October 16, 2018
    Assignee: Cavium, Inc.
    Inventor: Martin Leslie White
  • Publication number: 20180131618
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Application
    Filed: January 4, 2018
    Publication date: May 10, 2018
    Inventor: Martin Leslie White
  • Patent number: 9900253
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: February 20, 2018
    Assignee: Cavium, Inc.
    Inventor: Martin Leslie White
  • Publication number: 20180041450
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Application
    Filed: October 18, 2017
    Publication date: February 8, 2018
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Patent number: 9825884
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: November 21, 2017
    Assignee: Cavium, Inc.
    Inventors: Guy Townsend Hutchison, Sachin Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Publication number: 20160285990
    Abstract: A forwarding database cache system is described herein. The forwarding database cache system includes a main forwarding database and one or more forwarding database caches. When a packet is received, the cache is searched first for information such as address information, and if found, then the packet is forwarded to the appropriate destination. If the address information is not found in the cache, then the main forwarding database is searched, and the packet is forwarded to the appropriate destination based on the information in the main forwarding database.
    Type: Application
    Filed: March 24, 2015
    Publication date: September 29, 2016
    Inventor: Martin Leslie White
  • Publication number: 20160197852
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Application
    Filed: March 10, 2016
    Publication date: July 7, 2016
    Inventors: Guy Townsend Hutchison, Sachin Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Publication number: 20160065477
    Abstract: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
    Type: Application
    Filed: March 24, 2015
    Publication date: March 3, 2016
    Inventor: Martin Leslie White
  • Patent number: 7123486
    Abstract: A network device uses a multiple component connector plane to interconnect functional cards within the network device. Each of the components of the connector plane may be configured to contain a subset of the total interconnectivity of the connector plane and, optionally, to interconnect one or more subsets of the functional cards in the network device. The reduced connectivity of each component enables each component to be made in a less complex fashion. Using printed circuit board technology, this reduction in complexity enables lower layer count boards to be used to form the connector plane, resulting in lower overall costs. The connector plane may be a mid-plane or a back-plane.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: October 17, 2006
    Assignee: Nortel Networks, Limited
    Inventors: Paul John Koens, Martin Leslie White