Abstract: Techniques for selective disable of history-based predictors on mode transitions are described. An example apparatus comprises first circuitry to provide a history-based prediction, and second circuitry coupled to the first circuitry to selectively block and unblock a prediction from the first circuitry after a mode transition. Other examples are disclosed and claimed.

Abstract: In one embodiment, an apparatus comprises: a branch prediction circuit to predict whether a branch is to be taken; a fetch circuit, in a single fetch cycle, to send a first portion of a fetch region of instructions to a first decode cluster and send a second portion of the fetch region to the second decode cluster; the first decode cluster comprising a first plurality of decode circuits to decode one or more instructions in the first portion of the fetch region; and the second decode cluster comprising a second plurality of decode circuits to decode one or more other instructions in the second portion of the fetch region. Other embodiments are described and claimed.

Abstract: An embodiment of an integrated circuit may comprise a core and an instruction decoder communicatively coupled to the core to decode one or more instructions for execution by the core, where the instruction decoder includes two or more decode clusters in a parallel arrangement, and circuitry to offline a decode cluster of the two or more decode clusters. Other embodiments are disclosed and claimed.

Abstract: The invention relates to a sensor device with a sensor that is concealed by a cover for a motor vehicle and detects incoming electromagnetic waves, wherein the cover has a mount through which the incoming electromagnetic waves can pass, on at least part of which a layer is placed, characterized in that the layer is dichroic, nonmetallic, and reflective.

Abstract: An embodiment of an integrated circuit may comprise a return stack buffer (RSB), a speculative return stack buffer (SRSB), and circuitry coupled to the RSB and the SRSB, the circuitry to track a count until the SRSB is empty at a time of a prediction by a branch prediction unit, and return an output from the branch prediction unit that corresponds to one of the RSB and the SRSB based at least in part on the count until the SRSB is empty. Other embodiments are disclosed and claimed.

Abstract: Techniques and mechanisms for providing branch prediction information to facilitate instruction decoding by a processor. In an embodiment, entries of a branch prediction table (BTB) each identify, for a corresponding instruction, whether a prediction based on the instruction (if any) is eligible to be communicated, with another prediction, in a single fetch cycle. A branch prediction unit of the processor determines a linear address of a fetch region which is under consideration, and performs a search of the BTB based on the linear address. A result of the search is evaluated to detect for any hit entry which indicates a double prediction eligibility. In another embodiment, where it is determined that double prediction eligibility is indicated for an earliest one the instructions represented by the hit entries, multiple predictions are communicated in a single fetch cycle.

Abstract: Systems, methods, and apparatuses for power efficient generation of length markers for a variable length instruction set are described.

Abstract: A headlamp assembly for a motor vehicle comprising at least one headlamp, which has a light source for emitting visible light, a radiation source for emitting infrared radiation, and a light emission optics with a light entry surface, which visible light from the light source and infrared radiation from the radiation source strikes, and which has an optical exit-deflection element, which directs the infrared radiation from the radiation source toward the light entry surface of the light emission optics. The optical exit-deflection element comprises at least one optics, which broadens the infrared radiation emitted by the radiation source to form a radiation beam with a cross section broadened in a horizontal plane (HH), and a radiation distribution that has at least one intensity maximum disposed toward the edge in the radiation distribution, to one side of a vertical plane (VV), when viewed in a focal plane of the light emission optics.

Abstract: A headlamp assembly for a motor vehicle comprising at least one headlamp, which has a light source for emitting visible light, a radiation source for emitting infrared radiation, and a light emission optics with a light entry surface, which visible light from the light source and infrared radiation from the radiation source strikes, and which has an optical exit-deflection element, which directs the infrared radiation from the radiation source toward the light entry surface of the light emission optics. The optical exit-deflection element comprises at least one optics, which broadens the infrared radiation emitted by the radiation source to form a radiation beam with a cross section broadened in a horizontal plane (HH), and a radiation distribution that has at least one intensity maximum disposed toward the edge in the radiation distribution, to one side of a vertical plane (VV), when viewed in a focal plane of the light emission optics.

Abstract: A headlight of a motor vehicle including a light source and first projection optics, in which each one includes a respective first pair made of one respective first image mask and of one respective first projection lens with a first focal length, which is illuminated by the light source through the one respective image mask. The headlight has two projection optics, in which each one is featuring a respective second pair made of one respective second image mask and of one respective second projection lens with a second focal length, which is illuminated by the light source through the one respective second image mask. The second focal length is greater than the first focal length. An illuminated portion of the first image mask, has a shape of at least a first portion of an overall light distribution of the headlight, and a portion of the second image masks, has a shape of a central portion of the overall light distribution of the headlight.

Abstract: A headlight of a motor vehicle including a light source and first projection optics, in which each one includes a respective first pair made of one respective first image mask and of one respective first projection lens with a first focal length, which is illuminated by the light source through the one respective image mask. The headlight has two projection optics, in which each one is featuring a respective second pair made of one respective second image mask and of one respective second projection lens with a second focal length, which is illuminated by the light source through the one respective second image mask. The second focal length is greater than the first focal length. An illuminated portion of the first image mask, has a shape of at least a first portion of an overall light distribution of the headlight, and a portion of the second image masks, has a shape of a central portion of the overall light distribution of the headlight.

Abstract: The invention relates to a projection lens for use in an LED module of a motor vehicle headlamp. The LED module has a light source in the form of an LED matrix including numerous LED chips disposed in a matrix adjacent to and/or above one another, a primary lens including numerous primary lens elements disposed in a matrix adjacent to and/or above one another for bundling light emitted from the light source, and a projection lens. The projection lens projects a light exit surface of the primary lens to generate a predefined light distribution on a surface in front of the vehicle. The projection lens is designed such that it generates at least two separate images of the light exit surface of the primary lens on its image side, which are offset to one another in the horizontal direction.

Abstract: A method and apparatus for disabling ways of a cache memory in response to history based usage patterns is herein described. Way predicting logic is to keep track of cache accesses to the ways and determine if an access to some ways are to be disabled to save power, based upon way power signals having a logical state representing a predicted miss to the way. One or more counters associated with the ways count accesses, wherein a power signal is set to the logical state representing a predicted miss when one of said one or more counters reaches a saturation value. Control logic adjusts said one or more counters associated with the ways according to the accesses.

Abstract: A method and apparatus for disabling ways of a cache memory in response to history based usage patterns is herein described. Way predicting logic is to keep track of cache accesses to the ways and determine if an access to some ways are to be disabled to save power, based upon way power signals having a logical state representing a predicted miss to the way. One or more counters associated with the ways count accesses, wherein a power signal is set to the logical state representing a predicted miss when one of said one or more counters reaches a saturation value. Control logic adjusts said one or more counters associated with the ways according to the accesses.

Abstract: The invention relates to a projection lens for use in an LED module of a motor vehicle headlamp. The LED module has a light source in the form of an LED matrix including numerous LED chips disposed in a matrix adjacent to and/or above one another, a primary lens including numerous primary lens elements disposed in a matrix adjacent to and/or above one another for bundling light emitted from the light source, and a projection lens. The projection lens projects a light exit surface of the primary lens to generate a predefined light distribution on a surface in front of the vehicle. The projection lens is designed such that it generates at least two separate images of the light exit surface of the primary lens on its image side, which are offset to one another in the horizontal direction.

Abstract: A method and apparatus for disabling ways of a cache memory in response to history based usage patterns is herein described. Way predicting logic is to keep track of cache accesses to the ways and determine if an access to some ways are to be disabled to save power, based upon way power signals having a logical state representing a predicted miss to the way. One or more counters associated with the ways count accesses, wherein a power signal is set to the logical state representing a predicted miss when one of said one or more counters reaches a saturation value. Control logic adjusts said one or more counters associated with the ways according to the accesses.

Abstract: A method and apparatus for disabling ways of a cache memory in response to history based usage patterns is herein described. Way predicting logic is to keep track of cache accesses to the ways and determine if an access to some ways are to be disabled to save power, based upon way power signals having a logical state representing a predicted miss to the way. One or more counters associated with the ways count accesses, wherein a power signal is set to the logical state representing a predicted miss when one of said one or more counters reaches a saturation value. Control logic adjusts said one or more counters associated with the ways according to the accesses.

Abstract: A method and apparatus for disabling ways of a cache memory in response to history based usage patterns is herein described. Way predicting logic is to keep track of cache accesses to the ways and determine if an access to some ways are to be disabled to save power, based upon way power signals having a logical state representing a predicted miss to the way. One or more counters associated with the ways count accesses, wherein a power signal is set to the logical state representing a predicted miss when one of said one or more counters reaches a saturation value. Control logic adjusts said one or more counters associated with the ways according to the accesses.

Abstract: A method and apparatus for disabling ways of a cache memory in response to history based usage patterns is herein described. Way predicting logic is to keep track of cache accesses to the ways and determine if an access to some ways are to be disabled to save power, based upon way power signals having a logical state representing a predicted miss to the way. One or more counters associated with the ways count accesses, wherein a power signal is set to the logical state representing a predicted miss when one of said one or more counters reaches a saturation value. Control logic adjusts said one or more counters associated with the ways according to the accesses.

Abstract: A method and apparatus for disabling ways of a cache memory in response to history based usage patterns is herein described. Way predicting logic is to track consecutive misses to ways of a cache, i.e. hits/reads to other ways of cache. Based on the usage of ways and the non-usage of other ways, the way predicting logic determines if a way is to be powered down. In response to determining a way is to be powered down, the way predicting logic generates a power signal to power down an associated. Furthermore, upon a subsequent hit to a powered down way, the way predicting logic toggles the power signal to power up the associated way to ensure performance.