Patents by Inventor Martin M. Massucci

Martin M. Massucci has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit capable of mapping logical block address data across multiple domains
    Patent number: 7774575
    Abstract: A method according to one embodiment may include discovering at least one data block comprising logical block address information. The method may also include mapping logical block address information from a first domain into a second domain. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: August 10, 2010
    Assignee: Intel Corporation
    Inventors: Pak-Lung Seto, Martin M. Massucci
  • Bus controller having state machine for translating commands and controlling accesses from system bus to synchronous bus having different bus protocols
    Patent number: 5341495
    Abstract: A processing unit tightly couples to a system bus which utilizes a split cycle bus protocol and includes a local memory which is accessible from such bus. The local memory couples to a high speed synchronous bus which operates according to a predetermined bus protocol. The processing unit includes a state machine which couples to the high speed synchronous bus and to the asynchronous system bus. The state machine emulates the predetermined bus synchronous protocol in transferring commands issued to the local memory from the system bus which uses the split cycle protocol.
    Type: Grant
    Filed: October 4, 1991
    Date of Patent: August 23, 1994
    Assignee: Bull HN Information Systems, Inc.
    Inventors: Thomas F. Joyce, James W. Keeley, Richard A. Lemay, Bruno DiPlacido, Jr., Martin M. Massucci